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Front Panel and Connector Pinouts
The NI 6589 provides one PFI signal and one clock signal through the two SMA connectors
on the device front panel. Additionally, the NI 6589 provides sixteen LVDS signals, four
LVDS PFI signals, three single-ended PFI signals, and an LVDS clock out signal on the
Digital Data & Control (DDC) connector. The following figure shows the front panel
connector and signal descriptions for the NI 6589.
Figure 3.
NI 6589 Front Panel and Connector Pinout
NI 6589
PFI 0
CLOCK IN
1 Gbps
LVDS
PFI 1+
GND
PFI 2+
GND
PFI 3+
GND
GND
DIO 0+
GND
DIO 1+
GND
DIO 2+
GND
DIO 3+
GND
DIO 4+
GND
DIO 5+
GND
DIO 6+
GND
DIO 7+
GND
DIO 8+
GND
DIO 9+
GND
DIO 10+
GND
DIO 11+
GND
DIO 12+
GND
DIO 13+
GND
DIO 14+
GND
DIO 15+
GND
GND
GND
GND
GND
PFI 1–
PFI 2–
PFI 3–
DIO 0–
DIO 1–
DIO 2–
DIO 3–
DIO 4–
DIO 5–
DIO 6–
DIO 7–
DIO 8–
DIO 9–
DIO 10–
DIO 11–
DIO 12–
DIO 13–
DIO 14–
DIO 15–
1
3
2
4
6
5
7
9
8
10
12
11
13
15
14
16
18
17
19
21
20
22
24
23
25
27
26
28
30
29
31
33
32
34
36
35
37
39
38
40
42
41
43
45
44
46
48
47
49
51
50
52
54
53
55
57
56
58
60
59
61
63
62
64
66
65
67
69
68
70
72
71
73
SE_PFI_3
SE_PFI_2
DDC CLK OUT–
DDC CLK OUT+
GND
SE_PFI_1
STROBE–
PFI 4 –
PFI 4+
DIGIT
AL D
A
TA & CON
TROL
Caution
To avoid permanent damage to the NI 6589, disconnect all signals
connected to the NI 6589 before powering down the module, and connect signals
only after the adapter module has been powered on by the FlexRIO FPGA module or
Controller for FlexRIO.
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NI 6589 Getting Started Guide