Figure 5.
LVDS Data and PFI Lines
Data from
NI FlexRIO FPGA Module
(GPIO Output)
110
Ω
Data to
NI FlexRIO FPGA Module
(GPIO Input)
110
Ω
Switch
DIO <0..15>
DIO <0..15>+ and
PFI <1..4>+
Direction Control from
NI FlexRIO FPGA Module
(GPIO Direction)
and
PFI <1..4>
Figure 6.
Single-Ended PFI Lines
Data from
NI FlexRIO FPGA Module
(GPIO Output)
Output Enable from
NI FlexRIO FPGA Module
(GPIO Direction)
Data to
NI FlexRIO FPGA Module
(GPIO Input)
SE_PFI <1..3>
and PFI 0
50
Ω
Figure 7.
Clock Output Signals
Clock from
NI FlexRIO FPGA Module
(GPIO Output)
Output Enable from
NI FlexRIO FPGA Module
(GPIO Direction)
DDC CLK OUT+
LVDS
LVDS
DDC CLK OUT
Switch
110
Ω
10 k
Ω
10 k
Ω
NI 6589 Getting Started Guide
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© National Instruments
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