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National Instruments 6584R, Руководство пользователя и технические характеристики, Страница: 2 / 19

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NI 6584R User Guide and Specifications

2

ni.com

Connecting Signals

Front Panel

Figure 2 shows the Connector 0 (Ports 1–8) pin assignments for the NI 6584 in the full duplex 
configuration. Connector 0 (Ports 1–8) is a 68-pin VHDCI connector that distributes its signals through the 
NI VHDCI-to-Eight DB9 cable (197546-01) to the device under test (DUT). RX pins are acquisition 
signals, and TX pins are generation signals. The full duplex configuration of the NI 6584 has individual 
RX and TX pins.

Note

The pinouts for Connector 0 are the same for both terminated and unterminated devices.

Figure 2.  

NI 6584 Connector 0 Pin Assignments (Full Duplex)

68 34

67 33

66 32

65 31

64 30

63 29

62 28

61 27

60 26

59 25

58 24

57 23

56 22

55 21

54 20

53 19

52 18

51 17

50 16

49 15

48 14

47 13

46 12

45 11

44 10

43

9

42

8

41

7

40

6

39

5

38

4

37

3

36

2

35

1

Connector 0 (Ports 0-8)

TX_6+

TX_7–

RX_7–

RX_6+

TX_7+

RX_6–

TX_6–

RX_7+

GND

TX_4+

TX_5–

RX_5–

RX_4+

TX_5+

RX_4–

TX_4–

RX_5+

TX_2+

TX_3–

RX_3–

RX_2+

TX_3+

RX_2–

TX_2–

RX_3+

GND

TX_0+

TX_1–

RX_1–

RX_0+

TX_1+

RX_0–

TX_0–

RX_1+ 

TX_14+

TX_15–

RX_15–

RX_14+

TX_15+

RX_14–

TX_14–

RX_15+

GND

TX_12+

TX_13–

RX_13–

RX_12+

TX_13+

RX_12–

TX_12–

RX_13+

TX_10+

TX_11–

RX_11–

RX_10+

TX_11+

RX_10–

TX_10–

RX_11+

GND

TX_8+

TX_9–

RX_9–

RX_8+

TX_9+

RX_8–

TX_8–

RX_9+

RS485/RS422

Full Duplex

PFI

CONNECT

OR 0 (POR

TS 1

-8)

CLOCK

NI 6584

Содержание 6584R

Страница 1: ...or generation on the same pin The unterminated versions of the full and half duplex devices are useful in multi drop situations when you are already using a terminated bus and the terminated devices...

Страница 2: ...th terminated and unterminated devices Figure 2 NI 6584 Connector 0 Pin Assignments Full Duplex 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51...

Страница 3: ...ssis NI is not liable for any damage resulting from such signal connections For the maximum input and output ratings for each signal refer to the Specifications section of this document 68 34 67 33 66...

Страница 4: ...I to Eight DB9 cable 197546 01 connected to the NI 6584 at Connector 0 Ports 1 8 and then fanning out to display each of its eight nine pin port connectors Figure 4 NI 6584 and NI VHDCI to Eight DB9 C...

Страница 5: ...RX_1 RX_3 RX_5 RX_7 RX_9 RX_11 RX_13 RX_15 7 TX_1 TX_3 TX_5 TX_7 TX_9 TX_11 TX_13 TX_15 8 TX_0 TX_2 TX_4 TX_6 TX_8 TX_10 TX_12 TX_14 9 TX_0 TX_2 TX_4 TX_6 TX_8 TX_10 TX_12 TX_14 GND Ground Table 2 Pi...

Страница 6: ...GPIO_21 1 GPIO_1 0 GCLK_SE GPIO_18 1 Channel 1 GPIO_22 1 GPIO_14 0 GPIO_7_CC 0 GPIO_14_n 0 Channel 2 GPIO_8 0 GPIO_12 0 GPIO_23_CC 1 GPIO_27 1 Channel 3 GPIO_9 0 GPIO_13 0 GPIO_24_CC 1 GPIO_29 1 Chann...

Страница 7: ...HDCI to Eight DB9 cable to the DUT with proper termination Note This exercise shows how to complete these tasks for the full duplex version of the NI 6584 To complete these tasks with a different hard...

Страница 8: ...On the front panel complete the following steps to acquire data a Set the Acq Data Width control to a number between 1 and 32 The default is 8 b Set the Samples to Acquire control to a number between...

Страница 9: ...584R This exercise also demonstrates how to compile the FPGA VI on your target and run a VI on the host machine This exercise shows how to complete these tasks for the full duplex version of the NI 65...

Страница 10: ...the NI 6584 refer to the NI 6584 Component Level Intellectual Property section of this document 8 Select NI 6584 Full Duplex to configure the software for the full duplex version of the NI 6584R 9 Sel...

Страница 11: ...me appears under the Open FPGA VI Reference function on the block diagram 8 Add a While Loop to the block diagram with a control on the loop condition 9 Add the Read Write Control function from the FP...

Страница 12: ...ule RX indicator returns the number 65 535 because all RX lines are floating 4 Click the Stop button on the front panel and close the VI NI 6584 Component Level Intellectual Property The LabVIEW FPGA...

Страница 13: ...nversion NI 6584 Basic Connector Provides read write access to all RS 485 422 channels on Connector 0 Ports 1 8 The individual data lines for each connector are accessed using a U16 data type in LabVI...

Страница 14: ...lp1 Embedded in LabVIEW Help Contains information about the basic functionality of LabVIEW FPGA Module NI FlexRIO Help1 Embedded in LabVIEW FPGA Module Help Contains FPGA module adapter module and CLI...

Страница 15: ...bus Figures 10 and 11 show the block diagrams for the full and half duplex versions of the NI 6584 Figure 10 NI 6584 Block Diagram Full Duplex Figure 11 NI 6584 Block Diagram Half Duplex Note The VHDC...

Страница 16: ...tage 100 A load High Minimum 3 0 V Low Maximum 0 1 V Power Power requirements from the NI FlexRIO FPGA module 12 V 100 mA 1 2 W max 3 3 V 500 mA 1 65 W max Physical Dimensions 13 1 2 0 12 9 cm 5 2 0 8...

Страница 17: ...r UL and other safety certifications refer to the product label or the Online Product Certification section Electromagnetic Compatibility This product meets the requirements of the following EMC stand...

Страница 18: ...ational Instruments corporate headquarters is located at 11500 North Mopac Expressway Austin Texas 78759 3504 National Instruments also has offices located around the world to help address your suppor...

Страница 19: ...struments trademarks Other product and company names mentioned herein are trademarks or trade names of their respective companies For patents covering National Instruments products technology refer to...

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