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Chapter 4
DRAM Timing Setting...
Press <Enter> and to enter the sub-menu screen.
Configure DRAM Timing by SPD
Selects whether DRAM timing is controlled by the SPD (Serial Presence
Detect) EEPROM on the DRAM module. Setting to [Enabled] enables the
following fields automatically to be determined by BIOS based on the
configurations on the SPD. Selecting [Disabled] allows users to config-
ure these fields manually.
4.5 Advanced Chipset Features
NOTE:
Change these settings only if you are familiar with the chipset.