Theory of Operation
6-4
DRS4000 Receiver
User and Technical Manual
the key parameters of the incoming signal via the TPS
information and configures it accordingly.
These parameters include Modulation Type, Forward Error
Correction (FEC), Guard Interval (GI), and Spectrum Inversion
(SI). Only the bandwidth of the signal (6, 7, or 8 MHz) and the
receive channel and frequency need to be specified by the user.
In the DRS4000 Receiver, there are four COFDM demodulation
ICs. Each IC is responsible for demodulating the signal. The
four signals are combined using the Maximal Ratio Combining
(MaxRC) technique to produce one MPEG transport stream
signal with enhanced characteristics that provide an overall
diversity improvement factor. That improvement factor can be
about 4 to 5 dB for a two-input system and about 8 to 9 dB for a
four-input system, depending on channel characteristics.
This signal is subsequently output as two ASI streams, one for
driving the SD/HD MPEG decoder module, and one to be used
as the monitor output. Refer to the Maximal Ratio Combining
(MaxRC) Manual (part no. 400586-1) for additional information
on MaxRC techniques.
Each COFDM demodulator IC, once locked on to an incoming
signal, can provide important signal performance measurements
such as:
•
Received Carrier Level (RCL)
•
Link Quality (LQ)
•
Bit Error Ratio (BER)
•
Modulation Error Ratio (MER)
•
Signal to Noise Ratio (SNR)
You can view these measurements in real-time via the receiver’s
control panel.
The MPEG decoder module supports SD and HD video. It has
two composite video output ports, and two SDI output ports (one
is for monitoring and the other is for the standard signal).
From the MPEG Module, composite video is run through an SDI
composite converter and is used to drive the video monitor on
the front panel.
The decoder module accepts a digital ASI signal from the
COFDM diversity demodulator and recovers the compressed
video (either NTSC or PAL) and/or audio signals. The analog
audio outputs are used for four-channel audio; the digital audio
outputs are supported at the 75 ohm layer with multiple
embedded AES/EBU audio outputs. The module is also capable
of linear pass-through mode.
Additional features provided by the MPEG decoder module
include a serial wayside data channel and BISS decryption
capabilities.
The Processor Module is an embedded computer that manages
OAM&P (Operations, Administration, Maintenance, and
Provisioning) functionality within the DRS4000 Receiver. The
Processor Module receives user input via a keypad on the front
panel of the receiver and through a network interface.
Software running on the Processor Module’s microprocessor
interprets user commands and relays them to the receiver’s
internal subsystems. Replies to user commands and system
status are output via an LCD screen on the front panel of the
receiver and through a network interface. Connections to other
DRS4000 internal subsystems are made by serial
communications channels.
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