Motorola MCPN750A, Инструкция по установке и эксплуатации

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** If the Chip Reset Bit is set to a 1, the bit will clear itself after the chip
reset is complete.
Power-On Reset
The MCPN750A SBC generates a hard reset at power-on. During power
up, reset is maintained for 140 to 560 milliseconds after the voltages have
reached the minimum threshold.
Undervoltage Reset
The MCPN750A SBC generates a hard reset when the Hot Swap power
control chip (LTC1643) detects a supply v5V, +3.3V, +12V or -
12V fall below minimum thresholds of +4.75V, +3.135V, +10.8 and -10.8
volts respectively. The reset is maintained for 140 to 560 milliseconds after
the voltages have returned to the minimum threshold. For undervoltage,
the Vcc threshold to reset delay is typically 10 microseconds.
Front Panel Push Button Reset
The front panel RESET switch generates a hard reset when depressed for
more than three (3) seconds. The reset is maintained as long as the switch
is depressed.
CompactPCI Reset (RST#)
The CompactPCI reset signal RST# is monitored by the 21554 PCI-to-PCI
bridge chip as the primary bus reset input. The bridge will generate a
secondary bus reset that is used to generate a board hard reset.
Watchdog Timer Reset
Both the Raven ASIC Watchdog Timer 2 and the M48T559 watchdog
timer may generate a hard reset when the associated timer expires, if this
function is enabled.