POST checkpoint codes
6-17
6
Additional bus checkpoints
While control is in the bus routines, additional checkpoints are output to I/O
port address 0080h as data to identify the routines being executed. There are
two byte checkpoints and these are:
• The low byte - The low byte of the checkpoint is the system BIOS
checkpoint where control is passed to the different bus routines.
• The high byte - The high byte of checkpoint indicates that the routine is
being executed in different buses.
Refer to Table 6-8 for additional bus checkpoint information.
Table 6-8. Additional bus checkpoints
Bits
Description
Bits 7 to 4
0000
0001
0010
0011
0100
0101
0110
0111
Function 0. Disable all devices on the bus.
Function 1. Initialize static devices on the bus.
Function 2. Initialize output devices on the bus.
Function 3. Initialize input devices on the bus.
Function 4. Initialize IPL devices on the bus.
Function 5. Initiate general devices on the bus.
Function 6. Initialize error reporting on the bus.
Function 7. Initialize add-on ROMs for all buses.
Bits 3 to 0
0
1
2
3
4
5
Specify the bus
Generic DIM Device Initialization Manager
Onboard System devices
ISA devices
EISA devices
ISA PnP devices
PCI devices
Содержание CPV5000
Страница 1: ...CPV5000 CompactPCI Single Board Computer Installation and Reference Guide CPV5000A IH3 ...
Страница 16: ...xvi ...
Страница 22: ...CPV5000 Single Board Computer Overview 1 6 1 ...
Страница 26: ...Getting Started 2 4 2 Figure 2 1 Installing the CPV5000 ...
Страница 80: ...Functional Description 4 24 4 ...
Страница 108: ...Power On Self Tests 6 18 6 ...
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