Motorola CP Series, Руководство по обслуживанию

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11-4 403 – 447 MHz UHF1 Theory Of Operation: UHF1 Frequency Generation Circuitry
11.3.4 Auto Power Control
The APC keeps the current supply constant to the final amp (Q403). The drain current of Q403 (final
amp) is sensed across resistor R417. The differential signal at the output of U401 (Pin 7) is passed to
Q404 and Q405 that produces a constant power output to the antenna. If the current is changed due
to change of battery voltage or load, APC controls gate voltage of Q403 and collector voltage of Q401
and drain voltage of Q402 to keep TX power stable. This circuit stabilizes TX power at a pre-
determined level adjusted by U402. This bias voltage is tuned in the factory. If the transistor (Q403) is
replaced, the RF Output Power must be tuned. By tuning the RF output power, the bias voltage will be
tuned through U402. Extra care has to be taken during the tuning process. Do not exceed the
maximum allowed bias voltage.
11.4 UHF1 Frequency Generation Circuitry
The PLL synthesizer subsystem consists of the reference oscillator (VCTCXO), VCO, PLLIC, Charge
pump and Loop Filter.
Figure 11-3. UHF1 Frequency Generation Unit Block Diagram
11.4.1 Reference Oscillator (12.8 MHz VCTCXO)
The reference oscillator is powered by regulated 5V provided by U505. The reference frequency
12.8MHz VCTCXO (Voltage Controlled Temperature Compensated Crystal Oscillator) is applied to
the PLL IC (U701) via Pin 1. Min frequency can be adjusted by chip trimmer of VCTCXO. This
frequency provides reference to the PLL IC and has a frequency stability of +/-2.5PPM (max) at the
temperature ranging from -30 to +60 Degree Celsius.
Mo dul ating
Signa l
FL70 1
12 .8 M Hz
R e f.O SC .
C h arge
P u mp
L oop
F i l ter
T X V C O
RX Ou t
To Mi x er
To P A D ri v er
T X Ou t
Circ u it
RX V C O
Circ u it
V o l tage
D o u b l er
Synt h esi z er
U 70 1
P LL D ata
f rom μ P