Mitsubishi V19-V21, Техническое руководство

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8-1
Chapter 8
Deflection & HV Circuitry
Although some nomenclature differs, the Deflection
circuitry is mostly the same as in previous models.
The main changes are:
• The Sync Signal Path differs.
• An added Flash Protect circuit.
Sync Block Diagram
The above Block Diagram shows the Sync Signal
path from the source to the VCJ, which generates
drive for the Vertical and Horizontal Deflection cir-
cuitry.
The sync source for NTSC signals, and component
format signals is in the Y or composite video (NTSC)
signal. The A/V Switch circuitry selects the Y, or
video signal of the desired source.
The output of the A/V Switch takes two paths:
1) To the Main Decoder
2) To a Sync Separator circuit.
The Main Decoder outputs separated Horizontal and
Vertical Sync. The Sync Separator outputs composite
sync (CSYNC), combined horizontal and vertical.
The CSYNC signal is applied, to the Main YCbCr
Select circuitry. Horizontal and Vertical Sync from
the DTV and VGA inputs are also directed to the
YCbCr Select circuit.
The CSYNC signal is broken down to separate hori-
zontal and vertical sync, and when selected as the
signal source is output from the YCbCr Select cir-
cuit. Horizontal and vertical sync from the YCbCr
Select circuit is applied to one set of inputs on a Sync
Select IC.
The second set of inputs to the Sync Select IC re-
ceives sync from the Main Decoder. The difference
in the two sets of sync signals is NTSC Sync from
the YCbCr Select circuit contains equalizing pulses.
The signals from the Main Decoder are generated by
count down circuitry and have no equalizing pulses.