10
IN STRUC TION S
Ze r o Pa g e X
Ad d r e s s in g m o d e :
F u n c tio n :
In s tr u c tio n s :
Ex a m p le :
Zero Page X
Specified the contents in a Zero Page memory
location as the data for the instruction. The address
in the Zero Page memory location is determined by
the following:
(a) Operand and the Index Register X are added. (If as
a result of this addition a carry occurs, it is
ignored.)
(b) The result of the addition is used as the low-order
byte of the address and 00
16
as the high-order
byte.
ADC, AND, ASL, CMP, DEC, DIV, EOR, INC, LDA, LDY,
LSR, MUL, ORA, ROL, ROR, SBC, STA, STY
Mnemonic
Machine code
∆
ADC
∆
$5E,X
75
16
5E
16
Addressing mode
44
16
00
16
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
Zero page
Data(XX
16
)
FF
16
Op-code (75
16
)
Operand (5E
16
)
(A)
←
(A) + (C) + XX
16
+ E6
16
= 1
44
16
Ignored
Zero page X
designation
Memory
Contents of Index Register X
