29
Your company internal use only.
Copyright (C) Mitsubishi Electric Corporation.
CV-0MW3R45,-2
VOLTAGE
Pin NO.
Pin Name
Function
Voltage
1
AVREF0
Reference voltage for an AD Converter on the CPU.
3.3
2
AVSS
GND for an AD Converter on the CPU.
0
3
DA3
Not Used
0
4
DA4
Not Used
0
5
AVREF1
Reference voltage for an AD Converter on the CPU.
3.3
6
P00
ACC 3.3V control terminal
0
7
P01
ACC 3.3V control terminal
0
8
FLMD0
Reprograming terminal for the CPU
3.3
9
VDD
Positive power supply pin for internal
3.3
10
REGC
Connection of regulator output stabilization capacitance
3.3
11
VSS
Ground potential for internal
0
12
X1(IN)
Connection of resonator for main clock
fig. 011
13
X2(OUT)
Connection of resonator for main clock
fig. 012
14
RESET
System reset input
3.3
15
XT1
Not Used (connected to GND)
0
16
XT2
Not Used
3.3
17
P02(NMI)
Not Used
0
18
DSP3V_DETECT
Low power detection terminal for the DSP (3.3V power supply)
3.3
19
P_ON_IN
System ACC input
0
20
DRST(JTAG)
for the on-chip debug function
0
21
RTS
Communication terminal for a PC
0
22
I2C_DA01
Communication terminal for the Power IC (refer to fig. 001)
fig. 001
23
I2C_CL01
Communication terminal for the Power IC (refer to fig. 002)
fig. 002
24
DSP_RESETOUT
Reset control for the IC701
3.3
25
RXD
Communication terminal for a PC
3.3
26
TXD
Communication terminal for a PC
0
27
CLK
Not Used
0
28
CTS
Communication terminal for a PC
0
29
IE_STBY
Power control for IE-BUS transceiver IC
3.3
30
USBON
USB Power control for a PC communication
0
31
IETX0
Communication terminal for the IE-BUS (connect to the head unit)
fig. 003
32
IERX0
Communication terminal for the IE-BUS (connect to the head unit)
fig. 004
33
EVSS
Ground potential for external (same potential as VSS)
0
34
EVDD
Positive power supply for external (same potential as VDD)
3.3
35
I2C_DA00
Communication terminal for the Power IC (refer to fig. 005)
fig. 005
36
I2C_CL00
Communication terminal for the Power IC (refer to fig. 006)
fig. 006
37
AK5357_PDN
Power control terminal for the IC002 (AK5357VT)
5
38
DCDC_CLK
Not Used
0
39
DDI(JTAG)
for the on-chip debug function
0
40
DDO(JTAG)
for the on-chip debug function
0
41
DCK(JTAG)
for the on-chip debug function
0
42
DMS(JTAG)
for the on-chip debug function
0
43
PCM1753_ZEROL
Not Used
0
44
PCM1753_ZEROR
DAC ZERO flag
(when playing silent music, this pin's voltage will be 3.3V.)
0
45
PCM1690_AMUTEO Analog mute control for the IC200
3.3
46
PCM1690_AMUTEI Analog mute status of the IC200
3.3
47
-
Not Used
0
48
-
Not Used
0
49
DSP_SOMI
Communication terminal for IC701 (refer to fig. 007)
fig. 007
50
DSP_SIMO
Communication terminal for IC701 (refer to fig. 008)
fig. 008
Pin NO.
Pin Name
Function
Voltage
51
DSP_SCLK
Communication terminal for IC701 (refer to fig. 009)
fig. 009
52
DSP_RESET
Reset control for IC701
3.3
53
-
Not Used
0
54
PCM1690_RST
Reset control for IC200
3.3
55
-
Not Used
0
56
DSP_CHECK
Watchdog pulse from IC701.
(if there is no signal in this terminal, IC701 isn't working.)
fig. 013
57
PCM1690_ZERO1
DAC ZERO flag
(when playing silent music or setting vol 0, this pin's voltage will be 3.3V.)
0
58
PCM1690_ZERO2
DAC ZERO flag
(when playing silent music or setting vol 0, this pin's voltage will be 3.3V.)
0
59
DSP_DIST
Control signal for the Distortion Limitor
(when playing 0dBFS 40Hz sine wave, set vol-max, punch max,
then this pin's voltage will be 3.3V.)
0
60
WP
Communication terminal for IC803
0
61
SDA
Communication terminal for IC803
3.3
62
SCL
Communication terminal for IC803
3.3
63
-
Not Used
0
64
-
Not Used
0
65
-
Not Used
0
66
-
Not Used
0
67
PCM1753_ML
Communication terminal for IC550
3.3
68
PCM1690_MS
Communication terminal for IC200
3.3
69
PCM1690_MD
Communication terminal for IC200
0
70
PCM1690_MC
Communication terminal for IC200
0
71
F_SI
Reprograming terminal for the CPU
3.3
72
F_SO
Reprograming terminal for the CPU
3.3
73
F_CLK
Reprograming terminal for the CPU
3.3
74
DSP_ENA
Communication terminal for IC701 (refer to fig. 014)
fig. 014
75
BATT_ON
B ON Voltage.
0
76
BATT_OFF
B OFF Voltage.
0
77
-
Not Used
0
78
-
Not Used
0
79
PCM1804_OVFL
Communication terminal for IC001
0
80
PCM1804_OVFR
Communication terminal for IC001
0
81
DSP_SCS
Communication terminal for IC701 (refer to fig. 010)
fig. 010
82
-
Not Used
0
83
-
Not Used
0
84
AUDIO_AMUTE_1
Mute terminal for IC701
3.3
85
F_HS
Reprograming terminal for the CPU
3.3
86
PCM1804_RST
Reset terminal for IC001
3.3
87
-
Not Used
0
88
-
Not Used
0
89
-
Not Used
0
90
-
Not Used
0
91
-
Not Used
0
92
-
Not Used
0
93
-
Not Used
0
94
-
Not Used
0
95
-
Not Used
0
96
-
Not Used
0
IC801 Pin No. 1 - 96
Notice
If it doesn’t be specified, the audio settings have to be set +B-ON, ACC-ON, volume 1, CD mode.
[V]
[V]
