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6
SYSTEM BLOCK DIAGRAM
TO Ring upper limit value
BFM #3, #2
DOWN/UP command
BFM #1
Counter mode BFM #0
16-bit
counter
1-phase
1-input
counter
DOWN/UP
Counter
16/32-bit
1-phase/
2-phase
φ
B
φ
A
Count pulse
Count start
DISABLE
PRESET
BFM #4 b0
TO
Direct initialization
Current value
register
BFM #21, #20
Minimum
value
BFM #25, #24
Maximum
value
BFM #23, #22
Comparisor
data
BFM #13, #12
TO
TO
Comparison
data
BFM #15, #14
*1
Sampling cycle
300
µ
s
BFM #4 b1
BFM #4 b9
BFM #4 b2 BFM
#4 b12
BFM
#4 b11
BFM #4 b10
S
R
BFM #4 b3
YH
YS
S
R
Compare
results
BFM #26
Terminal
status
BFM #27
Matched
Matched
Error status
BFM #29
for YH output
Reset
BFM #4 b8
for YS output
φ
Z
Initiali-
zation
BFM #4 b4
TO Preset data
BFM #11, #10
Model code
BFM #30
*1. Comparison is made at
the next sampling point
after an input count.