Mitsubishi Electric DD-5000, Руководство по обслуживанию, Страница: 45 / 76

3-25
Main ICs Function
Ref. No.
IC613
IC306
IC301
IC502
IC501
IC504
IC901
IC601
IC201
IC615
IC309
IC Name
S24C01AFJ-TB
ADV7170
MD36710X
TC9453F
TA1293F
KA3032
PCM1727
TMP94CS40AF-0103(Z)
TC203G08AF
MBM29F800TA-55
TC203G08AF-0101(Z)
Function
E E - P R O M
Video Encorder
AV Decorder
SERVO & Data Processor
RF Signal processing IC
5-CH Motor Driver
DA Converter
Main Micro Processor
Track Buffer
Flash ROM
3D DNR
Detail
Setup default, memorization of specification setting.
Built-in D/A converter. Encodes digital video signal to analog video
signal of NTSC/PAL system.
Decryption, MPEG-2 Decode, Audio Decode, Sub Picture Decode,
O S D .
Performs servo control of DVD or CD, and performs demodulation
and correction of RF signal.
Equalizes of playback RF signal and generates error detection signal
required for each servo operation.
5ch driver for motor driving.
Stereo audio DA converter with a dual PPL built-in.
Performs system control for all circuits.
Rate control and Buffer control.
Memorization for firmware.
3 Dimension Digital Noise Reduction.
Table 3-5-1
Table 3-5-2 (1/2) ADV7170 Table 3-5-2 (2/2) ADV7170
Function
RED/S-VHS C/V analog output.
Green/S-VHS Y/Y analog output.
Power supply
Ground pin
Power supply
Blue/Composite/U analog output
PAL/NTSC composite video output.
Voltage reference input for DACs or
voltage reference output.
A 150 ohm resistor connected from this
pin to GND is used to control full scale
amplitudes of the video signal.
This pin can be configured as an input by
setting MR22 and MR21 of mode register
2. It can be configured as a subcarrier
reset pin, in which case a high to low
transition on this pin will reset the
subcarrier to field 0. Alternately it may be
configured as a real time control (RTC)
input.
Teletext data request signal
Defaults to GND when teletext not selected
(enables backward compatibility to
ADV7175/ADV7176).
Teletext data
Defaults to V
AA
when teletext not selected
(enables backward compatibility to
ADV7175A/ADV7176.)
8 bit, 4:2:2 Multiplexed Y/Cr/Cb pixel port
(P7-P0) or
16 bit Y/Cr/Cb pixel port (P15-P0). P0
represents the LSB.
Ground pin
TTL clock input.
Name
RED/
CHROMA/V
GREEN/
LUMA/Y
V
A A
G N D
V
A A
BLUE/
CVBS/U
C O M P O -
S I T E
( C V B S )
V
R E F
R
S E T
S C R E S E T /
R T C
TTX REQ
TTX V
AA
P0-P4
G N D
CLOCK
Pin
No.
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Function
Power supply
8 bit, 4:2:2 Multiplexed Y/Cr/Cb pixel port
(P7-P0) or
16 bit Y/Cr/Cb pixel port (P15-P0).
P0 represents the LSB.
Ground
Power supply
8 bit, 4:2:2 Multiplexed Y/Cr/Cb pixel port
(P7-P0) or
16 bit Y/Cr/Cb pixel port (P15-P0).
P0 represents the LSB.
HSYNC (Modes 1 & 2) control signal.
Master Mode: control signal output
Slave Mode: control signal acceptance
Dual function field (Mode 1) and VSYNC
(mode 2) control signal.
Master Mode: control signal output
Slave Mode: control signal acceptance
Video blanking control signal. The pixel
inputs are ignored when this is logic level
"0". This signal is optional.
TTL address input. This signal set up the
LSB of the MPU address.
Ground pin
Power supply
Ground pin
This pin resets the on-chip timing generator
and sets the ADV7170 into default mode.
NTSC operation, timing slave mode 0, 8 bit
operation, 2 x composite & S VHS OUT.
MPU port serial interface clock input
MPU port serial data input/output
Compensation pin. Connect a 0.1
µ F
capacitor from COMP to V
AA
. For
optimum dynamic performance in low
power mode, the value of the COMP
capacitor can be varied as described in
low power mode section.
Name
V
A A
P5-P12
G N D
V
A A
P13-P15
H S Y N C
FIELD/
V S Y N C
BLANK
A L S B
G N D
V
A A
G N D
R E S E T
S C L O C K
S D ATA
C O M P