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MOSI2-RG8
RA12
RA13
RB5
RB4
RB3
RB2
RB1
RB6 RB7
RB8 RB9
RF13 RF12
RD14 RD15
TX1-RF3
RX1-RF2
MOSI1-RF8
MISO1-RF7
SCK1-RF6
SDA1-RG3
SCL1-RG2
RA14
RA15
RD8
RD9
RD10
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RF0
RF1
RG0
SCK2-RG6
VCC-3.3
dsPIC33FJ256GP710A PF
U1
RG15
RC2
MISO2-RG7
R5 27
R4 27
RA12
RA13
RF7
RF6
E9
10uF
M1X26
RB1
RB2
RB3
RB4
RB5
RB8
RB9
RA12
RA13
RA14
RA15
RB6
RB7
SCK1-RF6
MISO1-RF7
MOSI1-RF8
RG15
RG0
RD10
SCK2-RG6
MISO2-RG7
MOSI2-RG8
VCC-3.3
L
RST
R
RD0
RD1
RD2
RD3
RD4
RD5
RD8
RD9
RD14
RD15
RD6
RC2
RF12
RF13
RF0
RF1
RX1-RF2
TX1-RF3
SCL1-RG2
SDA1-RG3
M1X26
VCC-3.3
VCC-SYS
HDR1
12. Pads
The access to the microcontroller pins on the development system is enabled
via pads provided along the two long sides of the development system.
Pads HDR2
Pads HDR1
Figure 12-1: Pads connecting schematic