Technical Description
miriac MPX-LX2160A User Manual
V1.4
32/73
© MicroSys Electronics GmbH 2020
4.8
Clock Structure
The following table lists the clocks generated on the module:
Part
Function
Frequency
J15
DDRCLK
100 MHz
J15
GTXCLK125
125 MHz
J15
SYSCLK / CPLDCLK
100 MHz
J15
SERDES1_SLOW_REFCLK
100 MHz / 156.25 MHz / 161.1328125MHz
J15
SERDES1_FAST_REFCLK
100 MHz / 156.25 MHz / 161.1328125MHz
J15
SERDES2_SLOW_REFCLK
100 MHz / 156.25 MHz / 161.1328125MHz
J15
SERDES2_FAST_REFCLK
100 MHz / 156.25 MHz / 161.1328125MHz
J15
SERDES3_SLOW_REFCLK
100 MHz / 156.25 MHz / 161.1328125MHz
J15
SERDES3_FAST_REFCLK
100 MHz / 156.25 MHz / 161.1328125MHz
J15
CLKGEN1_OUT
100 MHz / 156.25 MHz / 161.1328125MHz
J15
CLKGEN2_OUT
100 MHz / 156.25 MHz / 161.1328125MHz
Q1
Crystal
25 MHz
Q4
Crystal
32.768 kHz
Q9
Crystal
32.768 kHz
Q13
Crystal
32.768 kHz
J41
FAN RPM Controller
Varying frequency
Figure 6 Clock structure