System Core, Boot Configuration and On-Board Memory 5
miriac SBC-LS1028A User Manual
V 1.0
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© MicroSys Electronics GmbH 2019
5.6
QSPI Flash
There are two different flashes on the CPU module which can be accessed by
means of chip select CS0# and CS1#.
Device access (CSx#) depends on the “BOOT_INV”
signal (see chapter 5.5)
QSPI NAND Flash
The SBC-LS1028A system is equipped with 512MB of Serial NAND Flash by
default. Different sizes may be available on request/order. The following table
shows the connections and signal levels of the Serial NAND Flash.
LS1028A
I/O
Range
QSPI Serial NAND Flash
TC58CYG2S0HRAIG
Pin
Name
Pin
Name
H12 /
D12
XSPI1_A_CS0# /
XSPI1_A_CS1#
→
LVTTL
1
CS
H10
XSPI1_A_SCK
→
LVTTL
6
CLK
4 / 9
GND
G11
XSPI1_A_DATA0
↔
LVTTL
5
SO0
F12
XSPI1_A_DATA1
↔
LVTTL
2
SO1
H14
XSPI1_A_DATA2
↔
LVTTL
3
SO2
E13
XSPI1_A_DATA3
↔
LVTTL
7
SO3
8
+1.8V
Table 5-3 QSPI Serial NAND Flash pin assignments