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VSC8221 Evaluation Board

VPPD-03471 VSC8221 User Guide Revision 1.0

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4.4.2

CAT5 to SGMII with Modified Clause 37 AutoNeg Disabled

To configure the device for Clause 37 Auto-negotiation disabled, perform these steps:

Set up the copper Ethernet traffic source (e.g., IXIA or Smartbits).
Connect an Ethernet cable to an RJ-45.
Plug in a SFP loopback module.
Write 0xBA20 to “MII Register” (Port 0) Reg 23 (Extended PHY Control #1).
Write 0x9040 to “MII Register” (Port 0) Reg 0 (SW Reset for PHY Control setting to take effect).
Monitor the link-up bit in MII Register 1, bit 2 (MII 1.2), read twice to update. Traffic should now be 
flowing.

4.5

Useful Registers

4.5.1

Ethernet Packet Generator

ExtMII 29E is the Ethernet Packet Generator register. Refer to datasheet for configuration options.

A bad-CRC counter is in ExtMII 23.7:0. This counter will be saturate at 0xFF and is cleared when read.

4.5.2

Far-End Loopback

When MII Register 23 bit 3 is set to 1, it forces incoming data from a link partner on the media side to be 
retransmitted back to the link partner on the media interface.

4.5.3

Near-End Loopback

When MII Register 0 bit 14 is set to 1, the transmit data (TDP/TDN) on the MAC side is looped back onto 
the receive data (RDP/RDN pins) to the MAC.

Содержание VSC8221

Страница 1: ...VSC8221 User Guide VSC8221 Evaluation Board...

Страница 2: ...Clk Option 4 3 1 7 Silabs Microcontroller 4 3 1 8 EEPROM Option 4 3 1 9 CMODE Pins 4 3 1 10 CLOCKOUT SMA 4 3 2 Software Requirements 4 4 Quick Start 5 4 1 Board Configuration 5 4 1 1 Clock and Reset 5...

Страница 3: ...ision History The revision history describes the changes that were implemented in the document The changes are listed by revision starting with the most current publication 1 1 Revision 1 0 Revision 1...

Страница 4: ...o includes Vitesse s VeriPHY Cable Diagnostics feature This document describes the operation of the VSC8221 Evaluation Board VSC8221EV The Quick Start section describes how to install and run the grap...

Страница 5: ...en powered by a bench top supply the board may draw up to 3 A maximum module included 3 1 2 Copper Port RJ45 Connections The RJ45 copper media PHY port J1 uses a generic RJ45 jack with a discrete Puls...

Страница 6: ...etail on how to program the desired operating condition parameters through the CMODE configuration bits and how to choose the value of each CMODE pull up or pull down resistor 3 1 10 CLOCKOUT SMA The...

Страница 7: ...the PLL enable position and holding SW 2 in the 25 MHz position upon power up 4 1 2 Power Up Provide 5VDC to the board by plugging in the power cable included in the kit to J20 Two green LEDs should i...

Страница 8: ...tart Programs Vitesse Semiconductor Corp VSC8221_Evaluation_System icons The initial window will detect the attached USB devices automatically The following figure shows a typical EVB Connection windo...

Страница 9: ...the datasheet there are a number of internal registers that must be changed from their default value during device initialization Use this method to initialize the device by loading vsc8221_workaround...

Страница 10: ...onitor the link up bit in MII Register 1 bit 2 MII 1 2 read twice to update Traffic should now be flowing 4 5 Useful Registers 4 5 1 Ethernet Packet Generator ExtMII 29E is the Ethernet Packet Generat...

Страница 11: ...tion Board VPPD 03471 VSC8221 User Guide Revision 1 0 9 5 Additional Information For any additional information or questions regarding the device s mentioned in this document contact your local sales...

Страница 12: ...etermine suitability of any products and to test and verify the same The information provided by Microsemi hereunder is provided as is where is and with all faults and the entire risk associated with...

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