Getting Started
UG0786 User Guide Revision 1.0
3
2.2
Block Diagram
The following block diagram shows all the components of the PolarFire Splash Board.
Figure 1 •
PolarFire Splash Board Block Diagram
2.3
Web Resources
For more information about the PolarFire Splash Board, see
PolarFire Splash Kit webpage
.
2.4
Board Overview
The PolarFire Splash Board features a PolarFire MPF300TS-1FCG484EES FPGA with the following
capabilities:
•
20-Kb dual-port or two-port LSRAM block with a built-in single error correct double error detect
(SECDED) capability
•
64 × 12 two-port µSRAM block implemented as an array of latches
•
18 × 18 multiply-accumulate (MACC) block with a pre-adder, a 48-bit accumulator, and an optional
16 deep × 18 coefficient RO
•
Built-in µPROM, modifiable at program time and readable at run time, for user data storage
•
Digest integrity check for FPGA, µPROM, and sNVM
•
Low-power features:
•
Low device static power
•
Low inrush current
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