Figure 6-4. ADC0.CTRLA - Enable ADC0
Bit
7
6
5
4
3
2
1
0
RUNSTDBY
CONVMODE
LEFTADJ
RESSEL[1:0]
FREERUN
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
Bit 0 – ENABLE
ADC Enable
Value
Description
0
ADC is disabled
ENABLE
1
ADC is enabled
/*Enable ADC0*/
ADC0.CTRLA = ADC_ENABLE_bm;
It is now possible to start measurement by writing a ‘
1
’ to the STCON (Start Conversion) bit in the Command
(ADC0.COMMAND) register.
Figure 6-5. ADC0.COMMAND - Start a Measurement
Bit
7
6
5
4
3
2
1
0
SPCONV
Access
R/W
R/W
Reset
0
0
Bit 0 – STCONV
Start Conversion
Writing a ‘
1
’ to this bit will start a conversion as soon as any ongoing conversions are completed. If in Free-Running
mode, this will start the first conversion. STCONV will read as ‘
1
’ as long as a conversion is in progress. When the
conversion is complete, this bit is automatically cleared. Writing a ‘
0
’ to this bit has no effect.
STCONV
/*Start an ADC conversion*/
ADC0.COMMAND = ADC_STCONV_bm;
After a conversion is started, it is necessary to wait for it to be done before reading the result. The RESRDY (Result
Ready) interrupt flag in the Interrupt Flags (ADC0.INTFLAGS) register will be triggered when a result is ready in the
Result (ADC0.RES) register.
Figure 6-6. ADC0.INTFLAGS - Check RESRDY Interrupt Flag
Bit
7
6
5
4
3
2
1
0
WCMP
Access
R/W
R/W
Reset
0
0
Bit 1 – WCMP
Window Comparator Interrupt Flag
This window comparator flag is set when the measurement is complete and if the result matches the selected
Window Comparator mode defined by the WINCM bit field in the Control E (ADCn.CTRLE) register. The comparison
is done at the end of the conversion. The flag is cleared by either writing a ‘
1
’ to the bit position or by reading the
Result (ADCn.RES) register. Writing a ‘
0
’ to this bit has no effect.
Bit 0 – RESRDY
Result Ready Interrupt Flag
The Result Ready interrupt flag is set when a measurement is complete and a new result is ready. The flag is cleared
by either writing a ‘
1
’ to the bit location or by reading the Result (ADCn.RES) register. Writing a ‘
0
’ to this bit has no
effect.
RESRDY
/*Wait for the ADC conversion to be done*/
while(!(ADC0.INTFLAGS & ADC_RESRDY_bm));
The result can be read in the Result (ADC0.RES) register. The result must be divided by 16 due to the oversampling.
This is easily done by right shifting the value in ADC0.RES 4 bits. The RESRDY interrupt flag will be automatically
cleared when ADC0.RES is read.
TB3287
Measuring VDDIO2
©
2020 Microchip Technology Inc.
Technical Brief
DS90003287A-page 13
