Microchip Technology SAM E70 Xplained Ultra, Руководство пользователя

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4. System Level Block Diagram
The following figure illustrates the high-level signal block diagram of the SAM E70 Xplained Ultra
Development Kit.
Figure 4-1. Signal Level Block Diagram
Wire buses that are tied together are connected together. In this system the SPI bus data and clock are
shared across several interfaces. The SPI Slave selects are addressed individually with GPIO.
System I
2
C uses I2C0 and connects to the debugger, EXT1, EXT2, and mikroBus/X32. Touch I
2
C uses
I2C2 and only goes from the microcontroller to the graphics connector.
The debugger has the following interfaces connected: DGI SPI, DGI I2C, DGI UART, and SWD.
UART wires from the microcontroller to the blocks are not shared with each other.
System Level Block Diagram
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2019 Microchip Technology Inc.
DS70005389A-page 11