EVB-LAN9252-3PORT
ETHERCAT
®
ESC PHY CONNECTION
MODE USER’S GUIDE
2015 Microchip Technology Inc.
DS50002403A-page 11
Chapter 1. Overview
1.1
INTRODUCTION
The LAN9252 is an 2/3 port EtherCAT
®
slave controller with dual integrated Ethernet
PHYs which each contain a full-duplex 100BASE-TX transceiver and support 100Mbps
(100BASE-TX) operation. 100BASE-FX is supported via an external fiber transceiver.
Each port receives an EtherCAT frame, performs frame checking and forwards it to the
next port. Time stamps of received frames are generated when they are received. The
Loop-back function of each port forwards the frames to the next logical port, if there is
either no link at a port, or if the port is not available, or if the loop is closed for that port.
The Loop-back function of port 0 forwards the frames to the EtherCAT Processing Unit.
The loop settings can be controlled by the EtherCAT master.
Packets are forwarded in the following order:
Port 0 -> EtherCAT Processing Unit -> Port 1 -> Port 2
The EtherCAT Processing Unit (EPU) receives, analyses and processes the EtherCAT
data stream. The main purpose of the EtherCAT Processing unit is to enable and coor-
dinate access to the internal registers and the memory space of the ESC, which can be
addressed both from the EtherCAT master and from the local application. Data
exchange between master and slave application is comparable to a dual-ported mem-
ory (process memory), enhanced by special functions e.g. for consistency checking
(SyncManager) and data mapping (FMMU). Each FMMU performs the task of bitwise
mapping of logical EtherCAT system addresses to physical addresses of the device.
The scope of this document is to describe the EVB set-up for LAN9252 which supports
3-port mode and its jumper configurations. The LAN9252 is connected to an RJ45
Ethernet jack with integrated magnetics for 100BASE-T connectivity. A simplified block
diagram of the LAN9252 can be seen
.
