Micrel, Inc.
SY88147DL Evaluation Board
January 2006
5
M9999-011606-A
or (408) 955-1690
4. LOS hysteresis:
a. The SY88147DL evaluation board
provides a potentiometer to allow for easy
adjustment of LOS
LVL
without the need for
an extra power supply. LOS
LVL
taps off
the potentiometer whose ends are
connected from V
CC
to V
REF
. V
REF
is a
reference voltage of approximately V
CC
–
1.3V. Hence, LOS
LVL
can be set to any
voltage from V
CC
to V
CC
–1.2V, as
specified in the SY88147DL data sheet.
The potentiometer creates a voltage
divider. Thus,
( )
( )
⎥
⎦
⎤
⎢
⎣
⎡
+
×
−
=
2.8k
Ω
k
Ω
R
k
Ω
R
1.3V
(V)
V
LOS
CC
LVL
Where R is the resistance of the
potentiometer VAR1. The proceeding steps
show how to find the LOS hysteresis for a
5mV
pp
LOS- assert voltage without
measuring R
:
b. Set 70004’s Data amplitude to 5mV
PP
.
c. Verify DMM157 displays that LOS is
HIGH.
d. If not, turn potentiometer VAR1 until LOS
is HIGH.
e. Slowly increase 70004A’s Data amplitude
until LOS becomes LOW. Note the
voltage at which LOS becomes LOW.
This is the LOS de-assert voltage.
f. Now slowly lower the 70004A’s Data
amplitude until LOS becomes HIGH
again. This should be the starting voltage
of 5mV
PP
. This is the LOS assert voltage.
g. Hysteresis (dB) = 20log (LOS De-assert
voltage/LOS Assert voltage). This should
be
>
2dB.
Evaluation Board Layout
The SY88147DL evaluation board enables fast and
thorough evaluation of the SY88147DL 1.25Gbps
PECL High-Sensitivity Limiting Post Amplifier with TTL
High-Gain Loss-of-Signal. The board is an easy-to-
use, 4-layer, high-speed coplanar design that uses
Rogers 4003 dielectric material to achieve high
bandwidth. The layer stack is shown in Table 1.
Layer Definition
L1 Signal/GND
L2 GND
L3 VCC
L4 GND
Table 1. Layer Stack
