Micrel MICRF506, Руководство пользователя

Страница: 13 / 42

Micrel MICRF506BML/YML
Values
Symbol Parameter
Min. Typ. Max.
Units
Tper Min. period of
SCLK 50 ns
Thigh Min. high time of
SCLK 20 ns
Tlow Min. low time of
SCLK 20 ns
tfall Max. time of
falling edge of
SCLK 1 µs
trise Max. time of rising
edge of SCLK 1 µs
Tcsr Max. time of rising
edge of CS to
falling edge of
SCLK 0 ns
Tcsf Min. delay from
rising edge of CS
to rising edge of
SCLK 5 ns
Twrite Min. delay from
valid IO to falling
edge of SCLK
during a write
operation 0 ns
Tread Min. delay from
rising edge of
SCLK to valid IO
during a read
operation
(assuming load
capacitance of IO
is 25pF) 75 ns
July 2006 13 M9999-092904
+1 408-944-0800
Table 6. Timing Specification for the 3-wire
Programming Interface
Power on Reset
When applying voltage to the MICRF506 a power
on reset state is entered. During the time period of
power on reset, the MICRF506 should be
considered to be in an unknown state and the user
should wait until completed (See Table 6). The
power on reset timing given in table 6 is covering all
conditions and should be treated as a maximum
delay time. In some application it might be beneficial
to minimize the power on reset time. In these cases
we recommend to follow below procedure: