Micrel KSZ9021RL-EVAL, Руководство пользователя

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KSZ9021RL-EVAL Board User’s Guide
Micrel, Inc. March 20, 2009
Rev. 1.0
8/24
The following table lists the strapping pin definitions for the KSZ9021RL-EVAL board jumpers.
Jumper Pin Pin Name Pin Function
JP1
JP2
JP3
JP4 36
38
41
42 MODE3
MODE2
MODE1
MODE0 The MODE[3:0] strap-in pins are latched at power-up /
reset and are defined as follows:
MODE[3:0] Mode
0100 NAND Tree
0111 Chip Power Down
1100
RGMII – advertise 1000Base-T full-
duplex only
1101 RGMII – advertise 1000Base-T full
and half-duplex only
1110 RGMII – advertise all capabilities
(10/100/1000 speed half/full duplex),
except 1000Base-T half-duplex
1111 RGMII – advertise all capabilities
(10/100/1000 speed half/full duplex)
All other MODE[3:0] settings not listed are reserved and
not used by the KSZ9021RL-EVAL.
MODE[3:0] = 1111 is the normal RGMII setting and is
set as the default for the board.
JP19
JP9
JP10 46
19
21 PHYAD2
PHYAD1
PHYAD0 The PHY Address is latched at power-up / reset and is
configurable to any value from 1 to 7.
PHY Address bits [4:3] are always set to ‘00’.
PHYAD[2:0] = 001 is set as the default for the board.
JP16 43 CLK125_EN
CLK125_EN is latched at power-up / reset and is defined
as follows:
Pull-up (1) = Enable 125MHz Clock Output
Pull-down (0) = Disable 125MHz Clock Output
Pin 55 (CLK125_NDO) provides the 125MHz reference
clock output option for use by the MAC.
CLK125_EN = 0 is set as the default for the board.
JP20 55 LED_MODE LED_MODE is latched at power-up / reset and is defined
as follows:
Pull-up (1) = Single LED Mode
Pull-down (0) = Tri-color Dual LED Mode
LED_MODE = 1 is set as the default for the board.
Table 2. Strapping Pin Definitions for KSZ9021RL-EVAL Board Jumpers