Micrel KSZ9021RL-EVAL, Руководство пользователя

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KSZ9021RL-EVAL Board User’s Guide
Micrel, Inc. March 20, 2009
Rev. 1.0
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4.5.3 RGMII Connection to GMAC
The KSZ9021RL-EVAL board exposes the RGMII signals on JP24 and JP25, as defined in the
following table.
Header
KSZ9021RL-EVAL
Signal Name
RGMII
Signal Name
(per spec)
JP24 pin 1 GND
JP24 pin 2 RX_CLK RXC
JP24 pin 3 RX_DV RX_CTL
JP24 pin 4 RXD0 RXD0
JP24 pin 5 RXD1 RXD1
JP24 pin 6 RXD2 RXD2
JP24 pin 7 RXD3 RXD3
JP25 pin 1 GND
JP25 pin 2 GTX_CLK TXC
JP25 pin 3 TX_EN TX_CTL
JP25 pin 4 TXD0 TXD0
JP25 pin 5 TXD1 TXD1
JP25 pin 6 TXD2 TXD2
JP25 pin 7 TXD3 TXD3
Table 6. RGMII Signals on JP24 and JP25
After resistors [R14, R16, R136-R139] are removed to open (disable) the RGMII Loop Back path,
the RGMI signals on JP24 and JP25 can be wired to a GMAC on another board for evaluation
and testing.
4.6 USB Port
The USB port (CN1) provides programming access to the KSZ9021RL device’s PHY registers
through its MDC/MDIO management pins.
See following software section for PHY register access.