Micrel Confidential
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KS8695PX Demo Board Description
Integrated Multi-Port PCI Gateway Solution
Table 5 KS8695PX SDRAM Signals
KS8695 Signal
SDRAM Signal
Description
SDOCLK
CLK
Clock from KS8695PX to
SDRAM.
SDICLK
N/A (Feedback from
SDOCLK)
KS8695PX uses this clock to
register SDRAM data.
DATA[31..0]
DQ[31..0]
Bi-directional data bus
ADDR[11..0] A[11..0] Address
bus
ADDR[21..20]
BA[1..0]
Bank Address Inputs
SDCSN0
CS# (Chip 0)
SDRAM chip select (active low)
SDCSN1
CS# (Chip1)
SDRAM chip select (active low)
SDRASN
RAS#
SDRAM row address strobe
(active low)
SDCASN
CAS#
SDRAM column address strobe
(active low)
SDQM[3..0]
DQM[3..0]
SDRAM input/output mask.
SDWEN
WE#
SDRAM write enable
