7I90HD 32
REFERENCE INFORMATION
LBP16
SPACE 3: FPGA FLASH EEPROM CHIP ACCESS
Example: read 1024 bytes (0100h doublewords) of flash space at address 00123456:
01CE000056341200
Write FL_ADDR (0000) with pointer (0x00123456)
404E0400
Issue read command (FL_DATA = 0004) With count of 0x40
double words (256 bytes). Note do not use LBP16 increment
bit! Flash address always autoincremented
400E
Next 0x40 doublewords = 256 bytes
400E
Next 0x40 doublewords = 256 bytes
400E
Next 0x40 doublewords = 256 bytes
Note that this is close to the maximum reads allowed in a single LBP packet (~1450
bytes)
Writes and erases require that the EEPROMWEna be set to 5A03. Note that
EEPROMWEna is cleared at the end of every LPB packet so the write EEPROMWEna
command needs to prepended to all flash write and erase packets. The following is written
on separate lines for clarity but must all be in one packet for correct operation.
Example: Write a 256 byte page of flash memory starting at 0xC000:
01D91A00035A
Write EEPROMWEna with 0x5A03
01CE000000C00000
Write flash address
40CE0400
Issue write flash data command with count
12345678
Doubleword 0
ABCD8888
Doubleword 1
...
FFFFFFFF
Doubleword 63 (= 256 bytes)
014E0000
Read new address to commit write and so some data is
returned for host synchronization (so host waits for write to
complete)