6I68 Manual 13
OPERATION
LEDS
The 6I68 has 3 status LEDS, CR3: a RED PWRFAIL LED that indicates that the
3.3V output is out of regulation, CR1: a RED /DONE LED tha indicates that the FPGA is
not configured, and CR2: a green power on LED.
IO LEVELS
The FPGA chips used in the 3X2X modules are not 5V tolerant but external bus
switch parts are used on the 6I68 to make the I/O pins 5V tolerant. The bus switch parts
disconnect the FPGA pins from the I/O pins when the I/O pins are driven to positive voltage
levels that would damage the FPGA.
The voltage level that causes disconnect can be selected to be ~4V (3.3V mode) or
~3.3V (5Vmode). For most applications, the 3.3V mode should be used. The 5V mode is
useful when driving 5V referred loads.
Note that there is no protection against negative input voltages other than the input
clamp diodes in the FPGA and bus switches, so negative input voltages must be limited
to -.5V
STARTUP I/O VOLTAGE
After power-up or system reset and before the the FPGA is configured, the FPGAs
pull-up resistors will pull all I/O signals to a high level. If the FPGA is used for motion
control or controlling devices that could present a hazard when enabled, external circuitry
should be designed so that this initial state results in a safe condition.
POWER SUPPLY
The 6I68 uses a on card switching regulator from the bus +12V to supply the 5V
power to the I/O connectors. Maximum total 5V current is 4A. 3.3V module power is taken
directly from the PCIE bus connector.
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