5I25 3
HARDWARE CONFIGURATION
PRECONFIG PULLUP ENABLE
The Xilinx FPGA on the 5I25 has the option of having weak pull-ups on all I/O pins
at power-up or reset. The default is to enable the pull-ups. To enable the built-in pull-ups,
(the default condition) jumper W4 should be placed in the UP position. To disable the
internal pull-ups, W4 should be in the DOWN position.
PCI BUS ISOLATION
The 5I25 uses bus switches to provide 5V tolerance on the PCI bus. These bus
switches can be turned off to disconnect the FPGA from the PCI bus. This is valuable
when debugging FPGA PCI firmware. W5 controls the PCI bus isolate function. For
normal operation W5 must be in the UP position. To disconnect the FPGA from the BUS,
move W5 to the DOWN position.
