Measurement Computing PCI-PDISO16, Руководство пользователя

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Chapter 4
Functional Description
Basic architecture
The PCI-PDISO16 provides isolated input channels and relay output channels on each
connector. The block diagram shown in
Figure 4-1 illustrates the board’s functionality.
PCI
CONTROLLER
BADR1
Boot
EEPROM
Control
Registers
Decode/Status
Bus
Timing
Controller FPGA and Logic
Local Bus
PCI Bus (5V, 32-BIT, 33 MHZ)
Control
Bus
Con
tro
l
Interrupt
Control
+5V
+12V
-12V
BADR2
Interrupt
Con
tr
o
l
Por
t
A
Rel
a
ys 0-
7
Ip
o
rt
A
In
p
u
ts
0
-7
Po
rt
B
In
pu
ts
0
-7
R
ela
y
Ou
tp
u
ts
Is
o
la
te
d
In
p
u
ts
P
o
rt
B
R
ela
y
s 0
-7
Figure 4-1. Block Diagram – PCI-PDISO16
4-1