Chapter 4
Functional Details
Basic architecture
Figure 4-1 shows a simplified block diagram of the PCI-DAS6031 and PCI-DAS6033. These boards provide all
of the functional elements shown in the diagram.
The System Timing and Control (STC) is the logical center for all DAQ, DIO, and DAC (if applicable)
operations. It communicates over two major busses: a local bus and a memory bus.
The local bus carries digital I/O data and software commands from the PCI Bus Master. There are two Direct
Memory Access (DMA) channels provided for data transfers to the PC.
Primarily, the memory bus carries A/D and D/A related data and commands. There are three buffer memories
provided on the memory bus:
!
The
queue buffer
(8K configuration memory) stores programmed channel numbers, gains, and offsets.
!
The
ADC buffer
(8K FIFO [First In, First Out]) temporarily stores scanned and converted analog inputs.
!
The
DAC 16K buffer
stores data to be output as analog waveforms.
Auxiliary input & output interface
The board's 100-pin I/O connector provides six software-selectable inputs and three software-selectable outputs.
The signals are user-configurable clocks, triggers and gates.
Refer to "
DAQ signal timing
" for information about these signals and their timing requirements.
Table 4-1 lists the possible signals and the default signals of the nine pins.
4-1
Содержание PCI-DAS6031
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