McCain ATC eX NEMA, Руководство пользователя

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C C
B B
A A
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Vista, California 92081
2365 Oak Ridge Way
8
Local Bus Interface, Flash memory, System Memory, SRAM backup memory and RTC
A
9/23/2010 9:23:53 AM
C:\Documents and Settings\obeltran\My Documents\obeltran\ENGINE\CAD FILES\EngineBoard_4.SCHDOC
Size: McNum:
Printed Date:
File:
Revision:
Sheet of
Printed Time:
Tabloid
Designed By:
M69588
M Guerrero
PROPRIETARY AND CONFIDENTIAL:
THIS DOCUMENT CONTAINS INFORMATION PROPRIETARY
TO MCCAIN INC, AND MAY NOT BE USED, REPRODUCED OR
DISCLOSED BY OR TO ANY OTHER PARTY WITHOUT THE
WRITTEN CONSENT OF MCCAIN INC.
Title:
ATC2008 - Engine Board -
A0
25
A1
24
A2
23
A3
22
A4
21
A5
20
A6
19
A7
18
A8
8
A9
7
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
48
A17
17
A18
16
A19
9
A20
10
A21
13
DQ0
29
DQ1
31
DQ2
33
DQ3
35
DQ4
38
DQ5
40
DQ6
42
DQ7
44
DQ8
30
DQ9
32
DQ10
34
DQ11
36
DQ12
39
DQ13
41
DQ14
43
DQ15/A-1
45
VSS
46
VDD
37
VSS
27
WE
11
RESET
12
WP/ACC
14
RY/BY
15
CE
26
OE
28
BYTE
47
FLASH MEM 1
TC58FVM6B2AFT
L_A1
L_A2
L_A3
L_A4
L_A5
L_A6
L_A7
L_A8
L_A9
L_A10
L_A11
L_A12
L_A13
L_A14
L_A15
L_A16
L_A17
L_A18
L_A19
L_A20
L_A21
L_A22
+3.3VDC
L_R/W
L_OE UU-WE
UM-WE
L_OE
L_R/W
C165
0.1uF
CS-SRAM
C175
0.1uF
C177
0.1uF
C178
0.1uF
C176
0.1uF
A0
25
A1
24
A2
23
A3
22
A4
21
A5
20
A6
19
A7
18
A8
8
A9
7
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
48
A17
17
A18
16
A19
9
A20
10
A21
13
DQ0
29
DQ1
31
DQ2
33
DQ3
35
DQ4
38
DQ5
40
DQ6
42
DQ7
44
DQ8
30
DQ9
32
DQ10
34
DQ11
36
DQ12
39
DQ13
41
DQ14
43
DQ15/A-1
45
VSS
46
VDD
37
VSS
27
WE
11
RESET
12
WP/ACC
14
RY/BY
15
CE
26
OE
28
BYTE
47
FLASH MEM 2
TC58FVM6B2AFT
+3.3VDC
L_R/W
L_OE
+3.3VDC +3.3VDC
+3.3VDC
R15
10k
+3.3VDC
F_RDY F_RDY
+3.3VDC
L_A1
L_A2
L_A3
L_A4
L_A5
L_A6
L_A7
L_A8
L_A9
L_A10
L_A11
L_A12
L_A13
L_A14
L_A15
L_A16
L_A17
L_A18
L_A19
L_A20
L_A21
L_A22
L_A2
L_A3
L_A4
L_A5
L_A6
L_A7
L_A8
L_A9
L_A10
L_A11
L_A12
L_A13
L_A14
L_A15
L_A16
L_A17
L_A18
L_A19
L_A20
L_A1
AD
D
R
ES
S
BUS
ADDR
ES
S BU
S
ADDR
ES
S BU
S
DA
TA
BUS
DA
TA B
U
S
DA
TA
BUS
CO
NT
R
O
L
BU
S
CO
NT
R
O
L
B
U
S
CO
NT
R
O
L
B
U
S
A0
25
A1
24
A2
23
A3
22
A4
21
A5
20
A6
19
A7
18
A8
8
A9
7
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
48
A17
17
A18
16
A19
9
NC
10
I/O1
29
I/O2
31
I/O3
33
I/O4
35
I/O5
38
I/O6
40
I/O7
42
I/O8
44
I/O9
30
I/O10
32
I/O11
34
I/O12
36
I/O13
39
I/O14
41
I/O15
43
I/O16/A-1
45
VSS
46
VDD
37
VSS
27
R/W
11
CE2
12
OP
13
UB
14
CE1
26
OE
28
BYTE
47
LB
15
SRAM1
TC55VBM416AFTN55
LA27
AC37
LA28
AA32
LA29
AC36
LA30
AC34
LA31
AD36
LAD0
N32
LAD1
N33
LAD2
N35
LAD3
N36
LAD4
P37
LAD5
P32
LAD6
P34
LAD7
R36
LAD8
R35
LAD9
R34
LAD10
R33
LAD11
T37
LAD12
T35
LAD13
T34
LAD14
T33
LAD15
U37
LAD16
T32
LAD17
U36
LAD18
U34
LAD19
V36
LAD20
V35
LAD21
W37
LAD22
W35
LAD23
V33
LAD24
V32
LAD25
W34
LAD26
Y36
LAD27
W32
LAD28
AA37
LAD29
Y33
LAD30
AA35
LAD31
AA34
LALE
M37
LBCTL
AD35
LCKE
G36
LCLK0
J33
LCLK1/LCS_B6
J34
LCLK2/LCS7/CORE_CLK_OUT/CE_CLK_OUT
G37
LCS0
AD33
LCS1
AG37
LCS2
AF34
LCS3
AE33
LCS4
AD32
LCS5
AH37
LDP0/CKSTOP_OUT_B
AB37
LDP1/CKSTOP_IN_B
AB36
LDP2/LCS_B6
AB35
LDP3/LCS_B7
AA33
LGTA/LGPL4/LUPWAIT_LPBSE
AE35
LGPL5/CFG_CLKIN_DIV
AF36
LSDA10_LGPL0/CFG_RESET_SOURCE[0]
AB32
LSDCAS/LGPL3/CFG_RESET_SOURCE[2]
AD34
LSDRAS/LGPL2_LOE_B/RST_LOE_B
AC33
LSDWE/LGPL1/CFG_RESET_SOURCE[1]
AE37
LSYNC_IN
G35
LSYNC_OUT
F34
LWE0
AG35
LWE1
AG34
LWE2
AH36
LWE3
AE32
U1D
MPC8360_0
G
19
DIR
1
A1
2
B1
18
A2
3
B2
17
A3
4
B3
16
A4
5
B4
15
A5
6
B5
14
A6
7
B6
13
A7
8
B7
12
A8
9
B8
11
VCC
20
GND
10
U14
SN74LVTH245
G
19
DIR
1
A1
2
B1
18
A2
3
B2
17
A3
4
B3
16
A4
5
B4
15
A5
6
B5
14
A6
7
B6
13
A7
8
B7
12
A8
9
B8
11
VCC
20
GND
10
U16
SN74LVTH245
L_D0
L_D1
L_D2
L_D3
L_D4
L_D5
L_D6
L_D7
L_D8
L_D9
L_D10
L_D11
L_D12
L_D13
L_D14
L_D15 LAD0
LAD1
LAD2
LAD3
LAD4
LAD5
LAD6
LAD7
LAD8
LAD9
LAD10
LAD11
LAD12
LAD13
LAD14
LAD15
LAD16
LAD17
LAD18
LAD19
LAD20
LAD21
LAD22
LAD23
LAD24
LAD25
LAD26
LAD27
LAD28
LAD29
LAD30
LAD31
+3.3VDC
DA
TA B
U
S
LAD16
LAD17
LAD18
LAD19
LAD20
LAD21
LAD22
LAD23
LAD24
LAD25
LAD26
LA27
LA28
LA29
LA30
LA31
+3.3VDC
OE
1
D1
2
D2
3
D3
4
D4
5
D5
6
D6
7
D7
8
D8
9
GND
10
LE
11
Q8
12
Q7
13
Q6
14
Q5
15
Q4
16
Q3
17
Q2
18
Q1
19
VCC
20
U18
SN74LVTH573DB
OE
1
D1
2
D2
3
D3
4
D4
5
D5
6
D6
7
D7
8
D8
9
GND
10
LE
11
Q8
12
Q7
13
Q6
14
Q5
15
Q4
16
Q3
17
Q2
18
Q1
19
VCC
20
U17
SN74LVTH573DB
OE
1
D1
2
D2
3
D3
4
D4
5
D5
6
D6
7
D7
8
D8
9
GND
10
LE
11
Q8
12
Q7
13
Q6
14
Q5
15
Q4
16
Q3
17
Q2
18
Q1
19
VCC
20
U22
SN74LVTH573DB
OE
1
D1
2
D2
3
D3
4
D4
5
D5
6
D6
7
D7
8
D8
9
GND
10
LE
11
Q8
12
Q7
13
Q6
14
Q5
15
Q4
16
Q3
17
Q2
18
Q1
19
VCC
20
U19
SN74LVTH573DB
C162 0.1uF
+3.3VDC
+3.3VDC
+3.3VDC
+3.3VDC
+3.3VDC
C172
0.1uF
+3.3VDC
LAD0
LAD1
LAD2
LAD3
LAD4
LAD5
LAD6
LAD7
LAD8
LAD9
LAD10
LAD11
LAD12
LAD13
LAD14
LAD15
LA27
LA28
LA29
LA30
LA31
L_A1
L_A2
L_A3
L_A4
L_A5
L_A6
L_A7
L_A8
L_A9
L_A10
L_A11
L_A12
L_A13
L_A14
L_A15
L_A16
L_A17
L_A18
L_A19
L_A20
L_A21
L_A22
ADDR
ES
S BU
S
L_A0
L_A23
L_A24
L_A25
L_A26
L_A27
L_A28
L_A29
L_A30
L_A31
Local Bus Interface, Flash memory, System Memory, SRAM backup memory and RTC
Flash memory Bank No. 2
4 Mb x 16
Flash memory Bank No. 1
4 Mb x 16
SRAM Backup
1 Mb x 16
3.3VSRAM
LALE
LALE
LALE
LALE
LALE
LBCTL
LBCTL
LBCTL
R1
6
22R
1%
LCS0
LCS1
LCS2
LCS3
LCS4
LCS5
LWE0
LWE1
LWE2
LWE3
LCKE
LGPL0
LGPL1
LGPL3
LGPL4
LGPL5
LGPL0 R17 1K
LGPL1 R20 4K7
R31 4K7
R22 1K
LGPL3
LGPL4
R29 1K LGPL5
R23 4K7
R24 1K
+3.3VDC
R25 10K
R27 10K
R28 10K
R30 10K
R32 10K
+3.3VDC
LCS0
LCS1
LCS2
LCS3
LCS4
LCS5 R33 10K
CKSTOP_OUT
CKSTOP_IN
LCS6
LCS7
UU-WE
UM-WE
L_OE
L_R/W
L_A2
L_A3
L_A4
L_A5
L_A6
L_A7
L_A8
L_A9
L_A10
L_A11
L_A12
L_A13
L_A14
L_A15
L_A16
L_A17
L_A18
L_A19
L_A20
L_A21
L_A22 L_A22
L_A21
L_A2
L_A3
L_A4
L_A5
L_A6
L_A7
L_A8
L_A9
L_A10
L_A11
L_A12
L_A13
L_A14
L_A15
L_A16
L_A17
L_A18
L_A19
L_A20
DA
T
A
B
U
S
CONT
R
O
L
B
U
S
R13 56R
A0
A3
A1
A4
A2
A5
A3
B3
A4
B4
A5
C3
A6
C4
A7
D4
A8
H2
A9
H3
A10
H4
A11
H5
A12
G3
A13
G4
A14
F3
A15
F4
A16
E4
A17
D3
A18
H1
A19
G2
A20
H6
DQ0
B6
DQ1
C5
DQ2
C6
DQ3
D5
DQ4
E5
DQ5
F5
DQ6
F6
DQ7
G6
DQ8
B1
DQ9
C1
DQ10
C2
DQ11
D2
DQ12
E2
DQ13
F2
DQ14
F1
DQ15
G1
VSS
E6
Vc
cQ
E1
VssQ
D1
WE
G5
CRE
A6
LB
A1
UB
B2
CE1
B5
OE
A2
VCC
D6
A21
E3
A22
J4
ADV
J3
CLK
J2
Wait
J1
PSRAM1
MT45W8MW16BGX-708IT
L_A23
L_A24
L_A23
L_A24
A0
A3
A1
A4
A2
A5
A3
B3
A4
B4
A5
C3
A6
C4
A7
D4
A8
H2
A9
H3
A10
H4
A11
H5
A12
G3
A13
G4
A14
F3
A15
F4
A16
E4
A17
D3
A18
H1
A19
G2
A20
H6
DQ0
B6
DQ1
C5
DQ2
C6
DQ3
D5
DQ4
E5
DQ5
F5
DQ6
F6
DQ7
G6
DQ8
B1
DQ9
C1
DQ10
C2
DQ11
D2
DQ12
E2
DQ13
F2
DQ14
F1
DQ15
G1
VSS
E6
Vc
cQ
E1
VssQ
D1
WE
G5
CRE
A6
LB
A1
UB
B2
CE1
B5
OE
A2
VCC
D6
A21
E3
A22
J4
ADV
J3
CLK
J2
Wait
J1
PSRAM2
MT45W8MW16BGX-708IT
LU-WE
LM-WE
L_OE
L_R/W
DA
T
A
B
U
S
+3.3VDC +3.3VDC
R14 56R
CO
NT
R
O
L
BU
S
Option No. 2 SYSTEM MEMORY
8 Mb x 32
AD
D
R
E
S
S B
U
S
C166
0.1uF
C167
0.1uF
C164 0.1uF C163 0.1uF
C171 0.1uF
G
19
DIR
1
A1
2
B1
18
A2
3
B2
17
A3
4
B3
16
A4
5
B4
15
A5
6
B5
14
A6
7
B6
13
A7
8
B7
12
A8
9
B8
11
VCC
20
GND
10
U13
SN74LVTH245
LBCTL
+3.3VDC
C161 0.1uF
G
19
DIR
1
A1
2
B1
18
A2
3
B2
17
A3
4
B3
16
A4
5
B4
15
A5
6
B5
14
A6
7
B6
13
A7
8
B7
12
A8
9
B8
11
VCC
20
GND
10
U15
SN74LVTH245
LBCTL
+3.3VDC
C170 0.1uF
LAD0
LAD1
LAD2
LAD3
LAD4
LAD5
LAD6
LAD7
LAD8
LAD9
LAD10
LAD11
LAD12
LAD13
LAD14
LAD15
LAD16
LAD17
LAD18
LAD19
LAD20
LAD21
LAD22
LAD23
LAD24
LAD25
LAD26
LAD27
LAD28
LAD29
LAD30
LAD31
L_D16
L_D17
L_D18
L_D19
L_D20
L_D21
L_D22
L_D23
L_D24
L_D25
L_D26
L_D27
L_D28
L_D29
L_D30
L_D31
L_D24
L_D25
L_D26
L_D27
L_D28
L_D29
L_D30
L_D31
L_D16
L_D17
L_D18
L_D19
L_D20
L_D21
L_D22
L_D23
L_D24
L_D25
L_D26
L_D27
L_D28
L_D29
L_D30
L_D31
L_D16
L_D17
L_D18
L_D19
L_D20
L_D21
L_D22
L_D23
L_D24
L_D25
L_D26
L_D27
L_D28
L_D29
L_D30
L_D31
L_D16
L_D17
L_D18
L_D19
L_D20
L_D21
L_D22
L_D23
L_D24
L_D25
L_D26
L_D27
L_D28
L_D29
L_D30
L_D31
L_D16
L_D17
L_D18
L_D19
L_D20
L_D21
L_D22
L_D23
L_D8
L_D9
L_D10
L_D11
L_D12
L_D13
L_D14
L_D15
L_D0
L_D1
L_D2
L_D3
L_D4
L_D5
L_D6
L_D7
UU-WE
UM-WE
LM-WE
LU-WE
1
2
3
VCC
14
GN
D
7
U21A
SN74LVC08
4
5
6
U21B SN74LVC08
9
10
8
U21C SN74LVC08
12
13
11
U21D SN74LVC08
+3.3VDC
CONTROL BUS
C179
0.1uF
LWE0
LWE1
LWE2
LWE3
Option No. 4
C173
0.1uF
+3.3VDC
C180
0.1uF
+3.3VDC
C181
0.1uF
+3.3VDC
L_OE
+3.3VDC
C174
0.1uF
L_OE
L_R/W
LWE0
LWE1
LWE2
LWE3
LCS0 LCS1
LCS2 LCS2
LCS6
LCS7
R34 10K
R35 10K
R26 1K
Z3
M
M
SZ46
78T1
Z4
M
M
SZ46
78T1
PORESET PORESET
LBCTL
R219
10K
LBCTL
R220
10K
LALE
R221
10K
LCLK2
R222
10K
LCLK1
R223
10K
LCLK0
R224
10K
LCKE
VCC
2
CSO
6
Vout
1
BATON
3
VBAT
8
RST
7
GND
4
CSI
5
U33
MAX795TESA
+3.3VSDBY
+3.3VDC 3.3VSRAM
LCS3
CS-SRAM
CO
NT
R
O
L
BU
S
PORESET
C341
0.1uF
A
1
B
2
C
4
D
5
Y
6
GND
7
VCC
14
U20A
SN74HC21D
ADDRESS RANGE
0xFF800000 to 0xFFFFFFFF
DEVICE
MAP MEMORY
Internal Registers
Flash Memory No. 1
BackUp Memory
Main Memory PSRAM
CS
Flash Memory No. 2
USB Option No. 9
RTC Option No. 6
NA
LCS0
LCS1
LCS2
LCS3
LCS4
LCS5
0x00800000 to 0x00FFFFFF
0xFF400000 to 0xFF5FFFFF
0x10000000 to 0x11FFFFFF
0x01000000 to 0x011FFFFF
0x01200000 to 0x0120FFFF
0x01300000 to 0x0130FFFF
Main Memory DDR2 NA 0x00000000 to 0x3FFFFFFF
Remove: R20, R23
Remove: R22, R23
Remove: R22, R24
Remove: R31
Remove R29
Load from FLASH
RESET CONFIGURATION WORDS
Load from I2C
DEFAULT
CLKIN/2
CLKIN