54
pin
port
I/O
Name
STBY
Note
mode = 7
set
use Act. init
1 PG3
I/O BTMOD
-
O
L
L FLASH ROM Addres (A18)
2 PG4
I/O N.C
-
I
-
- Pull Down
3 VSS
I VSS
-
-
- GND
4 VSSNC
BÌ N.C.
-
GND
5
CC
V
I Vcc
-
-
-
-
-
- +5V
6 PC0
I/O _RSTDAC
-
O
L
L CS42418 Reset
7 PC1
I/O DA_INT
-
I
-
- CS42418
8 PC2
I/O DA_CS
-
O
L
H CS42418 Chip Select
9 PC3
I/O CDIN
-
I
-
- CS42418 Data Out
10 VSS
I VSS
-
-
-
- GND
11 PC4
I/O D_A
-
O
-
L DIR:H ,A DC :L
12 PC5
I/O XSTATE
-
I
-
- DIR XSTATE
13 PC6
I/O _CEDIR
-
OL
L DIR Chip Enable
14 PC7
I/O _XMODE
-
OL
L DIR Reset
15 PB0
I/O IICCLK
H
O
-
H IIC for EEPROM (CLK)
16 PB1
I/O IICDATA
H
I/O
-
H IIC for EEPROM (DATA)
17 PB2
I/O _TU_SD
-
I
L
Tuned
18 PB3
I/O TU_ST
-
I
H
Stereo/_Mono
19 VSS
I VSS
-
-
-
- GND
20 PB4
I/O TU_MUTE
-
O
H
H Tuner Mute
21 PB5
I/O _CE_TU
-
O
L
L Tuner Chip Enable
22 PB6
I/O N.C.
-
OL
L Open
23 PB7
I/O N.C.
-
OL
L Open
24 PA0
I/O TUDOUT
-
O
-
L Tuner Data Out
25 PA1
I/O TUCLK
-
O
-
L Tuner CLK
26 PA2
I/O TUDIN
-
I
-
Tuner Data IN
27 PA3
I/O RDSDIN
-
I
-
Tuner RDS Data
28 VSS
I VSS
-
-
-
- GND
29 PA4/_IRQ4
I/O REQ2
-
INT
L
- DSP FINTR EQ
30 PA5/_IRQ5
I/O DIR_INT
-
INT/I
-
DIR INT Output
31 PA6/_IRQ6
I/O _P_AMP_FAIL
-
INT
L
- Power amp Dectect
32 PA7/_IRQ7
I/O RDS_CLK
-
INT
-
-
- Tuner RDS Clock
33 P67/_IRQ3
I/O REQ1
-
INT
L
- DSP Inter Q
34 P66/_IRQ2
I/O RERR
-
INT
H
- DIR Error
35 VSS
I VSS
-
-
- GND
36 VSS
I VSS
-
-
-
-
- GND
37 P65/_IRQ1
I/O WAKEUP
-
INT
- Standby Mode Pelease
38 P64/_IRQ0
I/O _P_DOWN
-
INT
L
- Power Down Detect
39 VCC
I Vcc
-
-
-
- +5VL
40 PE0
I/O N.C.
-
I
L
L Pull Down 47k
41 PE1
I/O VIDEO_SW0
-
O
L
L Video Switch 1
42 PE2
I/O VIDEO_SW1
-
O
L
L Video Switch 2
43 PE3
I/O VIDEO_SW2
-
O
L
L Video Switch 3
44 VSS
I VSS
-
-
-
- GND
45 PE4
I/O VIDEO_SW3
-
O
L
L Video Switch 4
46 PE5
I/O HINBSY
-
I
-
- DSP Busy Signal
47 PE6
I/O N.C.
-
O
-
L Open
Open
Open
48 PE7
I/O N.C.
-
O
-
L
49 PD0
I/O N.C.
-
O
-
L
50 PD1
I/O VCR2MUTE
-
O
H
H VCR2 Audio Rec Output Mute
51 PD2
I/O VCR1MUTE
-
O
H
H VCR1 Audio Rec Output Mute
52 PD3
I/O SWMUTE
-
O
H
H Sub Woofer Mute
53 VSS
I VSS
-
-
-
- GND
54 PD4
I/O CNTMUTE
-
O
H
H Center Speaker Mute
55 PD5
I/O SBMUTE
-
O
H
H Surround Back Mute
56 PD6
I/O SL/SRMUTE
-
O
H
H Surround L/R Mute
57 PD7
I/O L/RMUTE
-
O
H
H Front L/R Mute
58 VCC
I Vcc
-
-
-
- +5VL
59 P30/TxD0
I/O DSPDOUT
-
SO
DSP DIR Control Data Output
60 P31/TxD1
I/O TXD
H
SO
H
UART for RS232C Flash WR
need Pull Up
Port Setting
Interrupt Status Input
61 P32/RxD0
I/O DSPDIN
-
SI
DSP DIR Control Data Input
62 P33/RxD1
I/O RXD
-
SI
-
UART for RS232C Flash
WR.
need Pull Up.
63 P34/SCK0
I/O DSPCLK
-
SC
DSP DIR Control Clock
64 P35/SCK1
I/O _CEFL
-
OL
L FL Driver chip sel
12. MICROPROCESSOR AND IC DATA
IC41 : H8S2398
Содержание SR-3001
Страница 22: ...22 21 8 BLOCK DIAGRAM 07 2 4 07 054 07 6 07 45 2 5 0 4 07 054 07 03 9 32 9 ...
Страница 24: ...26 25 2 0 4 07 4 054 07 2 054 07 INPUT PWB 2 3 ...
Страница 25: ...27 28 4 07 4 2 4 07 4 6 07 4 0 4 07 50 4 INPUT PWB 3 3 ...
Страница 27: ...31 32 VIDEO PWB 4 054 07 4 6 07 4 0 4 07 2 054 07 4 054 07 2 45 2 5 4 054 07 32 ONLY COMPONENT PWB ...
Страница 28: ...34 33 4 07 4 07 2 0 7 2 42 3 07 2 054 07 ENCORDER PWB FRONT PWB H P PWB PUSH SW PWB TACT PWB ...