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11
Biasing
There are two ways to bias the Total Recall. One is by ear and the other is with an oscilloscope. This document will show
you how to do it by ear. For scope biasing there are a few guides online the give lots of detail on how to do the procedure.
Here is one guide you might find useful for scope calibration:
http://www.davidmorrin.com/home/trouble/troubleeffects/electro-harmonix-memory-man/eh-7850/eh-7850-calibration
Before biasing, let's understand what we are doing and why. The BBD IC requires a bias voltage applied to its input in
order to work properly. This is done via a trimmer set up as a voltage divider connected to the power supply. An audio
source is applied to the BBD input (pin7) and the trimmer is adjusted until we get a result on the two outputs of the chip
(pins 3 and 4). The output is the delayed signal where the delay time is controlled by the two out-of-phase clock signals
(pins 2 and 6) generated by the CD4047 and processed through the sequential "bucket" steps. The two outputs are mixed
together and then sent to a gain recovery stage. This helps make up any volume loss introduced by the sequential steps
in the BBD (2048 steps for MN3008 and 4096 for MN3005). After the gain recovery, the signal is sent to the next BBD and
the same process is repeated.
Let's compare that to a circuit snippet from the TR schematic.
Our audio source comes in at D_IN and goes to pin7 of IC6. BIAS1 is our voltage divider also connected to pin7. CP1 and
CP2 are the two clock signals, pins1 and 5 are ground and power resp., pin8 is the Vgg voltage (in this case it is set to
-14vDC) and our outputs come from pins 3 and 4. These are mixed with another voltage divider created by R41 - R43.
Audio
Source
Bias
BBD
Clock
Output
Mix
Gain
Recovery
Содержание Total Recall
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