
User Manual - Rev1.0.2
M13design - 16 Dec. 21
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3
M13-RA6M3-EK PIN ASSIGNMENT
3.1
RA6M3 SYSTEM AND POWER PINS
3.1.1
BOOT PIN
Table 3. Boot pins
U1 Pin
Pin Functions
Board
Assignment
Signal Name
Default
Function
Remarks
68
P201/MD
MD
N/A
System
By default, the board is in
Single-Chip mode
(JP2 left open). In order to switch to
SCI/USB boot mode
,
connect JP2 with a 2mm jumper as stated in
Table 4. JP2
U1 Pin
Pin Functions
JP2
Pin status
Operating Mode
68
P201/MD
Opened
Pulled-up
Single-chip mode
68
P201/MD
Closed
Pulled-down
SCI/USB boot mode
3.1.2
SYSTEM RESET PIN
Table 5. System Reset pin
U1 Pin
Pin Functions
Board
Assignment
Signal Name
Default
Function
Remarks
67
RESET#
Reset
nRESET_SYS
System
The
M13-RA6M3-EK
System Reset signal is controlled by 3 sources: The power-on reset with the
Voltage supervisor U4, the Reset Switch (SW1) and the JTAG reset signal.
block diagram.
Figure 6. Reset Block Diagram
, the board’s Reset signal is also directly connected to the Reset signal of the
Ethernet PHY (U7) and the Capacitive Touch driver (CN8). This is done to compensate the lack of free
GPIOs left after mapping all the dedicated peripheral of the board.
RESET#
RA6M3
67
RST#
U7 (ETHERNET PHY)
24
RST
CN8 (CAP TOUCH)
4
A
B GND
VCC
Y
1
2
3
5
4
U5
SN74LVC1G08DBVR
R
17
10
K
3V3D
3V3D
C44
100nF
3V3D
C46
100nF
nRESET
R
18
10
K
3V3D
/RST
VCC
VSS
2
3
1
U4
ISL88002IH29Z-TK
3
1 2
4
SW3
PTS645SL43SMTR92LFS
SW_RESET
nRESET_SYS