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LS-AES 

 

Page 14 

 Clocking and Synchronization 

The Clock Source control on the LStream page of the LynxTWO/L22 Mixer provides LS-AES clock 
source selection as follows: 
 

Clock Source Selection 

Action 

Slave 

LS-AES clock is slaved to the host card system clock source. The 
system clock source is selected on the Adapter page of the Mixer. 

 

Digital In 1 

The word clock derived from the digital IN 1 port is the clock source 
for the LS-AES and host card.

 

Digital In 2 

The word clock derived from the digital IN 2 port is the clock source 
for the LS-AES and host card.

 

Digital In 3 

The word clock derived from the digital IN 3 port is the clock source 
for the LS-AES and host card.

 

Digital In 4 

The word clock derived from the digital IN 4 port is the clock source 
for the LS-AES and host card.

 

 

Important:

 

If a clock source other than Slave is used, the LynxTWO/L22 clock source must also be 

set to 

Header

 in the Adapter page of the Mixer

 
To insure glitch- free recording and playback using external AES devices 

without enabling the LS-

AES’s sample rate converters

, the LS-AES, host LynxTWO/L22, and external AES devices must run 

synchronously from a common clock source. There are only two scenarios to consider that satisfy this 
requirement: 

1.  The LynxTWO/L22 host card is the clock master. The LS-AES and external AES devices 

must run in clock slave mode. This case includes host card synchronization to external clocks 
such as word clocks and composite video. 

2.  An external AES device is the clock master. The LS-AES clock source must be derived from 

one of its digital inputs and the host card clock source must be set to Header. 

 
When the sample rate converter is enabled on a particular digital input of the LS-AES, the device 
driving the LS-AES does not have to run synchronously with the LS-AES. Data received from the 
input will be sample rate converted to rate of the clock source selected for the LS-AES. 
 

Dual Card Systems 

When using two LS-AES cards with one LynxTWO/L22, the clock source of at least one of the two 
cards 

must be set to Slave

. Failure to due so will cause unstable clock generation.  

 
To select a digital input from a second LS-AES (at LStream bus address 1) as the clock source: 

• 

Select one of the Digital In clock sources (1-4) from the LStream 1 page 

• 

Set the clock source on the LStream 2 page to Slave 

• 

Select Header as the host card’s clock source in the Adapter page of the LynxTWO/L22 
Mixer 

 
 

Содержание LS-AES

Страница 1: ...LS AES Owner s Manual interstage Phistersvej 31 2900 Hellerup Danmark Telefon 3946 0000 fax 3946 0040 www interstage dk pro audio with a smile...

Страница 2: ......

Страница 3: ...rnal Card Installation 5 External Connections 6 LynxTWO L22 Mixer Controls 7 LStream Panel Control Description 7 Digital I O Panel Description 8 LStream Interface to the Host LynxTWO L22 9 LS AES Outp...

Страница 4: ...the installation procedure and use of the LS AES You should have a working knowledge of Windows and general PC concepts Additionally refer to the User s Guide included with your LynxTWO or L22 Conten...

Страница 5: ...h a keyboard or mouse action Warranty Registration We are committed to providing you with the best service possible To help us serve you better please be sure to register your LS AES using one of the...

Страница 6: ...of firmware installed on your LynxTWO L22 will support the LS AES You can determine the firmware version by selecting About Mixer in the Mixer menu of the LynxTWO L22 Mixer Verify the firmware versio...

Страница 7: ...elow The LS AES must be secured to the computer chassis with a screw 3 The included LStream ribbon cable connects a LynxTWO L22 to either one or two LS AES internal cards Locate the cable end terminat...

Страница 8: ...cable connect directly to equipment with AES EBU ports For S PDIF coaxial connections use Lynx XLR to RCA S PDIF adapters CBL XFDRM18 and CBL XMDRM18 The following table shows the audio signal channel...

Страница 9: ...ream and LS AES routing The remaining four panels labeled Digital I O n provide control and status for the LS AES s digital inputs and outputs LStreamPanelControlDescription Device ID LStream device i...

Страница 10: ...he sample rate of the digital output signal is converted to the sample rate received on the corresponding digital input SRC Ratio Indicates the sample rate conversion ratio in either of SRC On modes D...

Страница 11: ...he architecture of LynxTWO L22 digital mixer supports a maximum of 16 input and 16 output channels that can assigned as needed to the available physical I O s Controlling the digital mixer requires an...

Страница 12: ...oopback Registers Digital Out L R LStream 1 Bracket Port Output LStream 2 Header Port Output Dual Internal Output 1 8 1 8 9 16 Select Format LStream 2 Transmitter 1 8 9 16 Select Format LStream 1 Tran...

Страница 13: ...elect control on the LStream page of the LynxTWO L22 Mixer has two settings 9 16 1 8 Maps mixer output channels 9 16 to LStream output channels 1 8 This is the default setting 1 8 9 16 Maps mixer outp...

Страница 14: ...nternal LStream 2 Receiver Input Submixer 1 16 Input Select Mute Dither Peak Level Digital Mixer Inputs LStream Channels 1 16 Serial data on ribbon cable LynxTWO A Model Input Section Record Bus 16 Ch...

Страница 15: ...44 1k 48k Dual wire connections require two digital input or output connections to transfer two audio channels Quad wire connections require four digital input or output connections to transfer two au...

Страница 16: ...vices must run synchronously from a common clock source There are only two scenarios to consider that satisfy this requirement 1 The LynxTWO L22 host card is the clock master The LS AES and external A...

Страница 17: ...d description of the problem including any error messages you received We will provide a response in a timely manner Telephone support is available by calling 949 515 8265 ext 206 from 9AM to 5PM Paci...

Страница 18: ...any LS AES digital input Modes Master mode utilizes LynxTWO or L22 low jitter sample clock to drive external AES devices Slave mode word clock derived from any digital input ARCHITECTURE Core FPGA ba...

Страница 19: ...the right to change or improve design of the product at any time without prior notice This warranty does not cover claims for damage due to abuse neglect alteration or attempted repair by unauthorize...

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