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Linear Technology DC1974 Series, Демонстрационное руководство

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dc1974f

DEMO MANUAL DC1974

ITEM QTY REFERENCE

PART DESCRIPTION

MANUFACTURER/PART #

36

1

U7

I.C., NC7WZ14P6X, SC70-6

FAIRCHILD SEMI., NC7WZ14P6X

37

1

U9

I.C., LTC6957IDD-2#PBF, DFN12DD-3X3

LINEAR TECH., LTC6957IDD-2#PBF 

38

1

SHUNTS FOR JP1 & JP2

SHUNT, 0.079" CENTER

SAMTEC, 2SN-BK-G

39

0

MH1, MH2

SCREW, M3 THREAD, #4-40x5/8"

KEYSTONE, 29316 (DO NOT INSTALL)

40

0

MH1, MH2

STAND-OFF, ALUM., M3 THREAD, 5.0 HEX, 

#4-40X1"

KEYSTONE, 24438 (DO NOT INSTALL)

41

2

STENCILS

STENCILS (TOP & BOTTOM)

STENCIL DC1974A-3 

DC1974A-A Required Circuit Components

1

1

DC1974A

GENERAL BOM

2

1

U1

I.C., 14-BIT, 310Msps, QFN48UK-7X7

LINEAR TECH., LTC2124IUK#PBF

DC1974A-B Required Circuit Components

1

1

DC1974A

GENERAL BOM

2

1

U1

I.C., 14-BIT, 250Msps, QFN48UK-7X7

LINEAR TECH., LTC2123IUK#PBF

DC1974A-C Required Circuit Components

1

1

DC1974A

GENERAL BOM

2

1

U1

I.C., 14-BIT, 170Msps, QFN48UK-7X7

LINEAR TECH., LTC2122IUK#PBF

PARTS LIST

Содержание DC1974 Series

Страница 1: ...proper input networks for dif ferent input frequencies Design files for this circuit board are available at http www linear com demo DC1974 DC1974 VARIANTS ADC PART NUMBER RESOLUTION Bit MAXIMUM SAMP...

Страница 2: ...ation with the host computer Follow the instructions in Appendix A for the Xilinx KC705 based system Verilog codemaybedownloadedfromtherespectiveADClanding page www linear com LTC2123 CHANNEL 1 SINGLE...

Страница 3: ...or testing purposes only In the default configuration these SMAs are not used J9 and J10 FPGA_CLK This is an optional clock input port for the FPGA It is used for testing purposes only In the default...

Страница 4: ...he DC1974 is single ended there is a transformer on the board that translates the single ended signal to a differential signal to drive the ADC ANALOG INPUT NETWORK In almost all cases off board filte...

Страница 5: ...configure PScope Underthe Configure menu goto ADCConfiguration Check the Config Manually box and use the following configuration options shown in Figure 2 Manual Configuration settings Bits 14 Alignm...

Страница 6: ...l to the device clock or device clock twice the sample rate n Off Default DEVCLK is equal to the sample rate n On DEVCLK is twice the sample rate Overflow Enables or disables the overflow bit in the o...

Страница 7: ...riods to trigger the alert in subclass 1 Valid values are 1 to 8 Alert Mode Subclass 1 Only Enables or disables the alert mode n Disabled Default Alert mode is disabled n Enabled Alert mode is enabled...

Страница 8: ...chnology will need to be configured as described in the Alternate FPGA Configuration section below 4 Apply power encode clock and analog input signals to the DC1974 board 5 VerifythatPScopesoftwareisi...

Страница 9: ...CONNECT DC2159 TO PC 1 ASSEMBLE BOARDS 4 POWER UP DC1974 TURN ON CLOCK AND ANALOG INPUTS 3 CONFIGURE FPGA VIA JTAG IF NECESSARY THEN REMOVE USB CABLE 2 POWER UP KC705 dc1974 F05 Figure 5 KC705 Based D...

Страница 10: ...16 1 L2 IND FERRITE BEAD 33 1206 MURATA BLM31PG330SN1L 17 0 L3 RES 1206 OPT 18 2 R1 R59 RES CHIP 3 01k 1 16W 1 0402 VISHAY CRCW04023K01FKED 19 1 R2 RES CHIP 10k 1 16W 1 0402 VISHAY CRCW040210K0FKED 20...

Страница 11: ...TALL 40 0 MH1 MH2 STAND OFF ALUM M3 THREAD 5 0 HEX 4 40X1 KEYSTONE 24438 DO NOT INSTALL 41 2 STENCILS STENCILS TOP BOTTOM STENCIL DC1974A 3 DC1974A A Required Circuit Components 1 1 DC1974A GENERAL BO...

Страница 12: ...NTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SCHEMATIC SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS SCALE NONE www linear com 3...

Страница 13: ...E25 GND E26 HB09_P E27 HB09_N E28 GND E29 HB13_P E30 HB13_N E31 GND E32 HB21_P E33 HB21_N E34 GND E35 HB20_P E36 HB20_N E37 GND E38 VADJ E39 GND E40 SCK SCK J13A SEAM 10X40PIN J13A SEAM 10X40PIN GND...

Страница 14: ...RY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL...

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