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dc1846af
DEMO MANUAL DC1846A
TYPICAL DC1846A REQUIREMENTS AND CHARACTERISTICS
DC1846A RECONFIGURATION
Table 2. Loop Filter Options
LOOP FILTER
TYPE
SELECTION
RESISTORS
RZ FROM
FRACNWIZARD
CI FROM
FRACNWIZARD
CP FROM
FRACNWIZARD
POWER
CPINV BOX,
SYSTEM TAB IN
FRACNWIZARD
Passive
R14 and R16 = 0Ω,
depopulate R13 and
R15
RZ_P
CI1_P in parallel
with CI2_P
CP_P
None
Unchecked
Active
R13 (except when
using an external
VCO) and R15 = 0Ω,
depopulate R14 and
R16
RZ_A
CI1_A in parallel
with CI2_A
CP_A
Determined by the
maximum allowed
tune voltage of the
populated VCO (U3
or U4), up to 24V
applied to V+OA
turret
Checked
PARAMETER
INPUT OR OUTPUT
PHYSICAL LOCATION
DETAILS
3.3V Power Supply
Input
J9 and J10 banana jacks
Low noise and spur-free 3.3V,
103mA**
5V Charge Pump Power Supply
Input
J11 and J12 banana jacks
Low noise and spur-free 5V,
22mA**
5V VCO Power Supply
Input
V+VCO turret
Low noise and spur-free 5V,
30mA**
REF+, Reference Frequency
Input
J2 SMA connector
Low noise 100MHz**, 6 to 10dBm
into 50Ω, see Note
RF+ and RF–
Two Outputs
J6 and J7 SMA connectors***
2328 to 2536MHz** in 190.7Hz**
steps, 0dBm
Loop Bandwidth
–
Set by loop filter component values
30.7kHz**
**These values are for the “DC1846A_100MHz.fracnset” file and included VCO.
***
Any unused RF output
must
be terminated with 50Ω, or poor spurious performance may result.
Note:
A low noise 100MHz reference frequency, such as the Wenzel 501-04516D OCXO, is recommended. If using a
different frequency, make sure to update the Fref and R_DIV boxes under the System tab in FracNWizard so that Fpfd
is still 50MHz. For example, if a 250MHz clock is used, Fref should be changed to 250MHz and R_DIV to 5. Ref BST
and FILT under the System tab in FracNWizard might need to be changed if the reference frequency and/or power is
different than what is recommended in the table above. More information can be found in the LTC6947 data sheet.
