THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MSPI_SCLK_M
UART_TX_0
R15733
10K
MSPI_MOSI_M
C15703
0.1uF
16V
R15756
33
R15703
33
DEBUG
+3.3V_NORMAL
MSPI_SCLK_M
R15730
10K
SPI_SCLK_S
TDI_0
UART_RX_1
R15723
4.7K
MSPI_CS_M
+3.3V_NORMAL
MSPI_MISO_M
R15754
33
XO_F16
TMS_1
C15705
0.1uF
16V
R15759
33
R15704
4.7K
R15727
270K
+3.3V_NORMAL
R15708
10K
OPT
R15765
33
C15704
10uF
OPT
UART_TX_0
R15750
33
P15701
12507WS-04L
DEBUG
1
2
3
4
5
R15757
33
SPI_MOSI_S
TRST_0
C15707
0.01uF
XO_F16
FLASH_WP_F16
UART_RX_0
F16_RESET_MICOM
X15700
24MHz
4
GND_2
1
X-TAL_1
2
GND_1
3
X-TAL_2
UART_RX_1
MSPI_CS_M
F16_CONNECT_DET
R15753
33
TRST_1
+3.3V_NORMAL
TCK_0
UART_TX_1
R15751
33
MSPI_MISO_M
SW15700
JTP-1127WEM
DEBUG
1
2
4
3
TCK_1
R15701
1M
R15761
33
R15770
10K
XIN_F16
TDI_1
C15702
0.1uF
16V
R15724
33
DEBUG
UART_TX_1
R15700 33
R15705
33
DEBUG
P15700
12507WS-04L
DEBUG
1
2
3
4
5
F16_RESET_MICOM
R15755
33
A_SPI_CS_S
UART_RX_0
TDO_0
R15707
10K
R15726
33
DEBUG
R15706
1K
TMS_0
XIN_F16
MSPI_MOSI_M
R15725
4.7K
R15702
4.7K
R15752
33
SPI_MISO_S
TDO_1
R15711
10K
R15731
10K
OPT
F16_BIT0
R15729
10K
F16_DIV_NON
R15722
10K
F16_120Hz
F16_BIT11
R15737
10K
F16_BIT1
R15739
10K
F16_BIT4
R15728
10K
F16_DIV_4
R15714
10K
R15736
10K
OPT
R15710
10K
OPT
F16_BIT12
R15735
10K
F16_DDR_SS
R15718
10K
F16_BIT6
R15715
10K
OPT
F16_BIT2
F16_BIT8
R15720
10K
R15712
10K
OPT
R15734
10K
F16_DDR_NON_SS
R15719
10K
OPT
R15740
10K
OPT
F16_BIT5
R15716
10K
R15741
10K
R15721
10K
F16_60Hz
R15713
10K
OPT
F16_BIT7
F16_BIT9
F16_BIT10
R15732
10K
R15717
10K
OPT
R15709
10K
+3.3V_NORMAL
F16_BIT3
R15738
10K
OPT
TMS_1
TDI_1
TCK_1
TDO_1
TRST_1
+3.3V_NORMAL
AR15703
33
I2C_SCL3
AR15702
33
I2C_SDA3
3D_SYNC_RF
F16_BIT0
F16_BIT2
F16_BIT1
F16_BIT8
F16_BIT5
F16_BIT4
F16_BIT7
F16_BIT10
F16_BIT6
F16_BIT12
F16_BIT9
F16_BIT3
F16_BIT11
DATA_FORMAT_1
DATA_FORMAT_0
R15768
33
R15769
33
R15760
10K
R15773
10K
OPT
R15774
10K
OPT
F16_BIT13
F16_BIT_GPIO29
LOCKAn
R15766
33
F16_BIT14
R15749
10K
R15762
10K
OPT
D15700
1N4148W
F16_DIODE_SUZHOU
D15700-*1
1N4148W-G
F16_DIODE_TSC
F16_BIT13
+3.3V_NORMAL
R15743
10K
R15742
10K
OPT
TRST_0
+3.3V_NORMAL
TMS_0
TCK_0
TDO_0
TDI_0
C15700
6.8pF
C15701
6.8pF
F16_BIT_GPIO29
IC9200
MX25L6435EM2I-10G
3
WP#/SIO2
2
SO/SIO1
4
GND
1
CS#
5
SI/SIO0
6
SCLK
7
HOLD#/SIO3
8
VCC
IC15200
LGE1124(F16)
TDI0
L2
TDO0
M1
TMS0
M2
TCK0
L1
TRSTN0
M3
TDI1
J2
TDO1
K1
TMS1
K2
TCK1
J1
TRSTN1
K3
UART0_RXD
G1
UART0_TXD
H1
UART1_RXD
G2
UART1_TXD
H2
I2C_SCL_M1
AM29
I2C_SDA_M1
AN29
I2C_SCL_M2
AL26
I2C_SDA_M2
AK26
I2C_SCL_S
F23
I2C_SDA_S
F24
SPI_CS_S
D24
SPI_MOSI_S
E23
SPI_MISO_S
E24
SPI_SCK_S
D23
MSPI_CS_M
B25
MSPI_MOSI_M
B24
MSPI_MISO_M
A24
MSPI_SCK_M
A25
TSPI_CS_M
AM27
TSPI_MOSI_M
AM28
TSPI_MISO_M
AN28
TSPI_SCK_M
AN27
SSPI_CS0_M
A19
SSPI_CS1_M
B19
SSPI_CS2_M
C19
SSPI_MOSI_M
D19
SSPI_SCK_M
C20
SSPI0_CS_S
D20
SSPI0_MOSI_S
A21
SSPI0_SCK_S
B21
SSPI1_CS_S
C21
SSPI1_MOSI_S
D21
SSPI1_SCK_S
C22
SSPI2_CS_S
D22
SSPI2_MOSI_S
A23
SSPI2_SCK_S
B23
OSPI_MOSI_M
AN31
OSPI_SCLK_M
AM31
OSPI_SCLK_S
AM30
OSPI_MOSI_S
AN30
DELOCK
AG27
HSLOCK
AG26
FRC_LRSYNC
AH28
L_VSIN_LD
AK29
L_VSOUT_LD
AH29
L_VSOUT_LD1
AJ29
DIM0_MOSI
AF28
DIM0_SCLK
AG28
DIM1_MOSI
AD28
DIM1_SCLK
AE28
DIM2_MOSI
AJ28
DIM2_SCLK
AJ27
DIM3_MOSI
AJ26
DIM3_SCLK
AJ25
PWM0
AG29
PWM1
AE29
PWM2
AF29
PWM_IN
AD29
EPI_EO
AL28
EPI_GCLK
AK27
EPI_MCLK
AL29
EPI_VST
AK28
XTALI
AM25
XTALO
AN25
PORES_N
AM26
TMODE0
AG24
TMODE1
AG25
TMODE2
AH24
TMODE3
AH25
CID0
AK24
CID1
AJ24
TRIGGER
AH27
BOOT_MODE
AK25
SYNC_ALIGN
AH26
GPIO00
E25
GPIO01
F25
GPIO02
C24
GPIO03
C23
GPIO04
E21
GPIO05
F21
GPIO06
E20
GPIO07
F20
GPIO08
E19
GPIO09
F19
GPIO10
D18
GPIO11
E18
GPIO12
F18
GPIO13
D17
GPIO14
E17
GPIO15
F17
GPIO16
E1
GPIO17
E2
GPIO18
F1
GPIO19
F2
GPIO20
E3
GPIO21
E4
GPIO22
F3
GPIO23
F4
GPIO24
G3
GPIO25
G4
GPIO26
J3
GPIO27
J4
GPIO28
K4
GPIO29
L3
GPIO30
L4
GPIO31
M4
F16_BIT14
F16_BIT15
F16_BIT15
R15745
10K
F16_Pre_Empha_50%
R15744
10K
F16_Pre_Empha_OFF
F16_BIT16
F16_BIT17
F16_BIT16
F16_BIT17
R15758
10K
OPT
R15747
10K
OPT
R15746
10K
R15748
10K
2015.09.15
F16 4K VX1
SPI,UART,GPIO
UART1 For FRC
Move to x-tal side
Clock for F16
(TSMC Recommend)
UART0 For system
F16 Reset
MAIN Clock(24MHz)
JTAG for F16
SPI Flash
To H15+
JTAG0 for SYSTEM
Normal Operation : 1
(Default)
(Internal Pull Up)
To H15+
To S-Flash memory
TMODE
System Clock for Analog block(24MHz)
F16 Option
JTAG1 for FRC
Chip ID
0 0 : 4K (Default)
BOOT MODE
- 0 : Default
- 1 : Not Used
BIT9
BIT0
60Hz
512M
11
BIT6
LGD
4K
Micron
High
LCD
BIT1
Low
INNORUX
SS
384M
00
Tx Frame Rate
DDR Vendor
Main SoC
M16
10
AV_BOX
BIT(11/12)
Display
BIT10
120Hz
BIT2
OLED
DDR Size
AUO
H15
01
Non_AV_BOX
BIT5
Resolution
Module Maker
BOE
8K
AV_BOX
L/DIMO_VS
L/DIMO_MOSI
L/DIMO_SCLK
DIVISION Type
10
This option is supported
in F16B0.
2 DIVISION
BIT(7/8)
01
NON DIVISION
00
8 DIVISION
4 DIVISION
11
** Default Select
GPIO used only for SIC
BIT15
BIT13
Vx1 Lane
Tx 16lane
Pre-emphasis
Tx 8lane,
Video 8lane
High
BIT14
High or NC
Low
Vx1 OSD input
Low
* BIT14 option is for Vx1 Eye improvement in case of over 1M cable.
In case of over 1M cable, select Low, Others select High or NC (Int Pull up)
Blended
Seprate
Vx1 TX
EPI 49"
10
01
11
Vx1 DE
00
Vx1 Sync
EPI 55"
Display Type
BIT(3/4)
50%
OFF
Low
BIT16
High
BIT17
Reserved
Reserved
Default
Default
Copyright © 2016 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Содержание OLED65G6P
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