- 152 -
Copyright © 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
7. CIRCUIT DIAGRAM
C3056
0.1u
u0
1
50
03
C
40
03
C
u2.
2
n0
1
01
03
C
u2.
2
31
03
C
80
03
C
u2.
2
VREG_MSME_1.8V
K0
1
00
03
R
0.47u
C3019
0.47u
C3016 C3017
0.47u
TP3001
C3020
0.47u
10
03
R
K0
01
TP3000
VREG_MSME_1.8V
VREG_MSME_1.8V
Fu
1
21
03
C
Fu
1
30
03
C
I
N
D
20
03
C
u1.
0
11
03
C
Fu
1
70
03
C
u1.
0
60
03
C
0.47u
C3026
C3033
0.47u
0.47u
C3036 C3037
0.47u 0.47u
C3038
C3057
0.47u
C3009
4.7u
U2001
L5
E10
AE22
AD25
AE18
AE15
AE11
AE7
Y5
T5
H25
E25
E22
Y25
V25
T25
P25
M25
K25
AE12
AC10
AC5
Y8
AF26
AF25
AF3
AF2
AE26
AB11
Y20
W19
U17
U11
P23
N23
M11
L17
L12
K23
K9
J19
G23
E19
C2
B26
B3
B2
T2
R8
R5
P9
N8
K6
K5
J6
J5
F9
E6
C8
C3
U6
T6
T3
R9
P8
P5
N9
K8
J9
J8
H6
H5
E9
E5
D3
B8
AE13
AE5
AB14
AB10
AA22
Y19
Y6
V22
U14
T16
T15
T14
T13
T12
R17
R16
R15
R14
R13
R12
P22
P17
P16
P15
P14
P13
P12
P11
P6
N22
N16
N15
N14
N13
N12
M16
M15
M14
M13
M12
L15
L13
L6
K22
G22
F19
F15
F10
E14
B4
7
G
A
6
G
A
5
G
A
4
G
A
3
G
A
7
2
G
A
6
2
G
A
5
2
G
A
4
2
G
A
3
2
G
A
2
2
G
A
1
2
G
A
0
2
G
A
2
G
A
9
1
G
A
8
1
G
A
7
1
G
A
6
1
G
A
5
1
G
A
4
1
G
A
3
1
G
A
2
1
G
A
1
1
G
A
0
1
G
A
1
G
A
7
2
F
A
1
F
A
7
2
E
A
1
E
A
7
2
D
A
1
D
A
7
2
C
A
1
C
A
7
2
B
A
1
B
A
7
2
A
A
1
A
A
7
2
A
6
2
A
5
2
A
4
2
A
3
2
A
2
2
A
1
2
A
0
2
A
9
1
A
8
1
A
7
1
A
6
1
A
5
1
A
4
1
A
3
1
A
2
1
A
1
1
A
0
1
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
6
1
E
4
1
F
5
A
A
2
2
H
1
1
N
5
N
8
1
E
3
1
E
5
U
9
T
7
2
Y
1
Y
7
2
W
1
W
7
2
V
1
V
7
2
U
1
U
7
2
T
1
T
7
2
R
1
R
7
2
P
1
P
7
2
N
1
N
7
2
M
1
M
7
2
L
1
L
7
2
K
1
K
7
2
J
1
J
7
2
H
1
H
7
2
G
1
G
7
2
F
1
F
7
2
E
1
E
7
2
D
1
D
7
2
C
1
C
7
2
B
1
B
9
G
A
8
G
A
5
6
_
C
N
6
6
_
C
N
7
6
_
C
N
8
6
_
C
N
9
6
_
C
N
0
7
_
C
N
1
7
_
C
N
2
7
_
C
N
3
7
_
C
N
4
7
_
C
N
5
7
_
C
N
6
7
_
C
N
7
7
_
C
N
8
7
_
C
N
9
7
_
C
N
0
8
_
C
N
1
8
_
C
N
2
8
_
C
N
3
8
_
C
N
4
8
_
C
N
5
8
_
C
N
6
8
_
C
N
7
8
_
C
N
8
8
_
C
N
9
8
_
C
N
0
9
_
C
N
1
9
_
C
N
2
9
_
C
N
3
9
_
C
N
4
9
_
C
N
5
9
_
C
N
6
9
_
C
N
7
9
_
C
N
8
9
_
C
N
9
9
_
C
N
0
0
1
_
C
N
1
0
1
_
C
N
2
0
1
_
C
N
3
0
1
_
C
N
4
0
1
_
C
N
1
D
V
S
R
2
D
V
S
R
8
P
_
D
D
V
9
P
_
D
D
V
0
1
P
_
D
D
V
G
R
P
_
E
S
U
F
Q
_
D
D
V
1
C
_
S
N
S
_
D
D
V
2
C
_
S
N
S
_
D
D
V
6
P
2
_
Y
H
P
B
S
U
_
D
D
V
3
P
3
_
Y
H
P
B
S
U
_
D
D
V
1
_
C
N
2
_
C
N
3
_
C
N
4
_
C
N
5
_
C
N
6
_
C
N
7
_
C
N
8
_
C
N
9
_
C
N
0
1
_
C
N
1
1
_
C
N
2
1
_
C
N
3
1
_
C
N
4
1
_
C
N
5
1
_
C
N
6
1
_
C
N
7
1
_
C
N
8
1
_
C
N
9
1
_
C
N
0
2
_
C
N
1
2
_
C
N
2
2
_
C
N
3
2
_
C
N
4
2
_
C
N
5
2
_
C
N
6
2
_
C
N
7
2
_
C
N
8
2
_
C
N
9
2
_
C
N
0
3
_
C
N
1
3
_
C
N
2
3
_
C
N
3
3
_
C
N
4
3
_
C
N
5
3
_
C
N
6
3
_
C
N
7
3
_
C
N
8
3
_
C
N
9
3
_
C
N
0
4
_
C
N
1
4
_
C
N
2
4
_
C
N
3
4
_
C
N
4
4
_
C
N
5
4
_
C
N
6
4
_
C
N
7
4
_
C
N
8
4
_
C
N
9
4
_
C
N
0
5
_
C
N
1
5
_
C
N
2
5
_
C
N
3
5
_
C
N
4
5
_
C
N
5
5
_
C
N
6
5
_
C
N
7
5
_
C
N
8
5
_
C
N
9
5
_
C
N
0
6
_
C
N
1
6
_
C
N
2
6
_
C
N
3
6
_
C
N
4
6
_
C
N
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND_A1
GND_A2
GND_A3
GND_A4
GND_A5
GND_A6
GND_A7
GND_A8
GND_A9
GND_A10
GND_A11
GND_A12
GND_A13
GND_A14
GND_A15
GND_A16
VDD_A1
VDD_A2
VDD_A3
VDD_A4
VDD_A5
VDD_A6
VDD_A7
VDD_A8
VDD_A9
VDD_A10
VDD_A11
VDD_A12
VDD_A13
VDD_C1_1
VDD_C1_2
VDD_C1_3
VDD_C1_4
VDD_C1_5
VDD_C1_6
VDD_C1_7
VDD_C1_8
VDD_C1_9
VDD_C1_10
VDD_C1_11
VDD_C1_12
VDD_C1_13
VDD_C1_14
VDD_C1_15
VDD_C1_16
VDD_C1_17
VDD_C1_18
VDD_C1_19
VDD_C1_20
VDD_C1_21
VDD_C1_22
VDD_C1_23
VDD_C1_24
VDD_C2_1
VDD_C2_2
VDD_C2_3
VDD_MDDI
VDD_P1_1
VDD_P1_2
VDD_P1_3
VDD_P1_4
VDD_P1_5
VDD_P1_6
VDD_P2_1
VDD_P2_2
VDD_P2_3
VDD_P3_1
VDD_P3_2
VDD_P3_3
VDD_P3_4
VDD_P3_5
VDD_P3_6
VDD_P4_1
VDD_P4_2
VDD_P7_1
VDD_P7_2
C3014
22u
C3015
0.47u
0.1u
C3055
0.1u
C3001
10n
C3035
10n
C3034
0.1u
C3031
C3030
10u
VREG_MSME_1.8V
VREG_MSMC1_1.25V
VREG_MSMC2_1.25V
C3044
10n
C3039
10u
0.1u
C3045
0.1u
C3046
0.1u
C3047
10n
C3054
0.1u
C3052
0
R3002
U3001
01
R
9
R
2
R
1
R
01
A
9
A
2
A
01
P
1
P
4
M
M3
1
G
01
B
1
B
G10
E5
F9
H7
E10
G5
D9
J7
C10
E7
N10
F8
M9
G6
L10
J8
K10
H2
J9
G2
K1
G9
B2
F10
E3
E9
H8
D10
G8
C9
F3
N9
J2
M10
L9
C7
K9
C8
J10
D7
D8
M2
D6
P9
E8
J1
D5
H9
F6
C1
F7
B9
E6
H4
M1
H3
P8
F5
H10
E4
H1
F4
D1
G4
B8
G3
J4
P6
H5
C5
H6
J5
N5
J6
B5
G7
K6
C6
K5
C3
K7
C4
L8
B4
K8
B7
L7
B3
L6
B6
L5
L4
N8
M7
K2
N7
J3
P5
F1
P4
F2
N4
K3
P3
D4
P2
E2
M8
D3
N6
E1
M6
D2
P7
C2
M5
L3
N3
L2
N2
L1
N1
K4
A0
IO0
A1
IO1
A2
IO2
A3
IO3
A4
IO4
A5
IO5
A6
IO6
A7
IO7
A8
IO8
A9
IO9
A10
IO10
A11
IO11
A12
IO12
BA0
IO13
BA1
IO14
IO15
DQ0
DQ1
CE#
DQ2
RE#
DQ3
WEN#
DQ4
CLE
DQ5
ALE
DQ6
WP#
DQ7
R_B#
DQ8
DQ9
VCCN0
DQ10
VCC1
DQ11
DQ12
VSSN0
DQ13
VSSN1
DQ14
DQ15
VDD0
DQ16
VDD1
DQ17
VDD2
DQ18
VDD3
DQ19
VDD4
DQ20
VDD5
DQ21
DQ22
VSS0
DQ23
VSS1
DQ24
VSS2
DQ25
VSS3
DQ26
VSS4
DQ27
VSS5
DQ28
DQ29
VDDQ0
DQ30
VDDQ1
DQ31
VDDQ2
VDDQ3
CS0#
VDDQ4
CS1#
VDDQ5
CLK
VDDQ6
CLK#
VDDQ7
CKE0
VDDQ8
CKE1
VDDQ9
WE#
RAS#
VSSQ0
CAS#
VSSQ1
DQM0
VSSQ2
DQM1
VSSQ3
DQM2
VSSQ4
DQM3
VSSQ5
DQS0
VSSQ6
DQS1
VSSQ7
DQS2
VSSQ8
DQS3
VSSQ9
1
C
N
2
C
N
3
C
N
A13
5
C
N
6
C
N
7
C
N
1
U
N
D
2
U
N
D
3
U
N
D
4
U
N
D
5
U
N
D
6
U
N
D
7
U
N
D
0
R3003
R3004
0
C3050
0.1u
0.1u
C3049
0.1u
C3043
C3042
0.1u
C3041
0.1u
C3040
0.1u
C3048
10u
VREG_MSMA_2.6V
VREG_MSMP_2.6V
C3051
0.1u
10n
C3053
0.47u
C3032
C3024
10n
C3023
10n
C3022
0.47u
C3028
0.47u
1n
C3025
VREG_MSMC1_1.25V
C3018
22u
C3029
1n
C3027
1n
C3021
10n
V3.
3_
B
S
U_
G
E
R
V
V6.
2_
A
M
S
M_
G
E
R
V
V9.
2_
2
X
U
A_
G
E
R
V
VREG_MSMP_2.6V
VREG_MSMA_2.6V
V8.
1_
E
M
S
M_
G
E
R
V
V6.
2_
P
M
S
M_
G
E
R
V
V8.
1_
E
M
S
M_
G
E
R
V
SDRAM_ADDR[13]
nRESETOUT
nWE2
nUB2
nOE2
nLB2
EBI2_DATA[9]
EBI2_DATA[8]
EBI2_DATA[7]
EBI2_DATA[6]
EBI2_DATA[5]
EBI2_DATA[4]
EBI2_DATA[3]
EBI2_DATA[2]
EBI2_DATA[15]
EBI2_DATA[14]
EBI2_DATA[13]
EBI2_DATA[12]
EBI2_DATA[11]
EBI2_DATA[10]
EBI2_DATA[1]
EBI2_DATA[0]
nNAND_FLASH_CS
NAND_FLASH_READY
nSDRAM_WE
nSDRAM_RAS
SDRAM_DQS3
SDRAM_DQS2
SDRAM_DQS1
SDRAM_DQS0
SDRAM_DQM3
SDRAM_DQM2
SDRAM_DQM1
SDRAM_DQM0
SDRAM_DCLK1
SDRAM_DCLK0
nSDRAM_CAS
SDRAM_BA1
SDRAM_BA0
SDRAM_ADDR[9]
SDRAM_ADDR[8]
SDRAM_ADDR[7]
SDRAM_ADDR[6]
SDRAM_ADDR[5]
SDRAM_ADDR[4]
SDRAM_ADDR[3]
SDRAM_ADDR[2]
SDRAM_ADDR[12]
SDRAM_ADDR[11]
SDRAM_ADDR[10]
SDRAM_ADDR[1]
SDRAM_ADDR[0]
P
M
A
R_
A
P_
M
S
G
SDRAM_DATA[31]
SDRAM_DATA[30]
SDRAM_DATA[29]
SDRAM_DATA[28]
SDRAM_DATA[27]
SDRAM_DATA[26]
SDRAM_DATA[25]
SDRAM_DATA[24]
SDRAM_DATA[23]
SDRAM_DATA[22]
SDRAM_DATA[21]
SDRAM_DATA[20]
SDRAM_DATA[19]
SDRAM_DATA[18]
SDRAM_DATA[17]
SDRAM_DATA[15]
SDRAM_DATA[14]
SDRAM_DATA[13]
SDRAM_DATA[12]
SDRAM_DATA[11]
SDRAM_DATA[10]
SDRAM_DATA[9]
SDRAM_DATA[8]
SDRAM_DATA[7]
SDRAM_DATA[6]
SDRAM_DATA[5]
SDRAM_DATA[4]
SDRAM_DATA[3]
SDRAM_DATA[2]
SDRAM_DATA[1]
SDRAM_DATA[0]
SDRAM_DATA[16]
nSDRAM_CS0
VREG_MSMC2_1.25V
VREG_MSMC1_1.25V
VREG_MSME_1.8V
VREG_MSME_1.8V
SDRAM_CKE0
nSDRAM_CS1
SDRAM_CKE1
I
B
S
S
_
5
8
2
6
R
T
R
VSNS_MSME_1.8V
VSNS_MSMC1_1.25V
VSNS_MSMC2_1.25V
2011.01.31
1'ST : HYNIX H9DA4GH4JJAMCR-4EM EAN61955301
2'ND : MICRON MT29C4G96MAZAPCJA-5IT EUSY0426801
For Artwork
SYMBOL Changed 2011.02.17
SYMBOL Changed 2011.02.17
0603
0603
0603
V
8
.
1
-
8
P
:
C
D
C
L
E
S
U
U
O
Y
F
I
Cap for MSM7227 Power
MSM7227 Power Part
0603
1608
1608 0603 0603 0603 0603 0603 0603
0603
For Artwork
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
1608
1608
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
1608
MSM7227 Turbo Changed