7. CIRCUIT DIAGRAM
- 154 -
LGE Internal Use Only
Copyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
L
K
J
I
H
G
F
E
D
C
B
A
12
11
10
9
8
7
6
5
4
3
2
1
L
K
J
I
H
G
F
E
D
C
B
A
12
11
10
9
8
7
6
5
4
3
2
1
30
2
R
K0
1
R208
220
2.2n
C204
VBAT
UAT200
12
11
10
9
8
7
6
5
4
3
2
1
GND
RX
TX
NC1
ON_SW
VBAT
NC2
NC3
NC4
DSR
RTS
CTS
GND
RX
TX
VCHAR
ON_SW
VBAT
PWR
URXD
UTXD
3G
2.5G
VCHG_VBUS
VREG_MSMP_2.6V
11
2
C
Fu
1
20
2
R
K1
CN200
16
15
8
7
9
6
10
5
11
4
12
3
13
2
14
1
18
17
10
2
R
K0
1
R210
100K
U201
3
2
4
1
5
VCC
GND
R218
100
20
2
A
V
00
2
A
V
10
2
A
V
31
2
R
K0
1
R215
100
C220
0.1u
C221
330p
VREG_MSMA_2.6V
41
2
C
u1.
0
51
2
C
u1.
0
71
2
C
u1.
0
VREG_TCXO_2.85V
R216
1K
330p
C210
C227
0.1u
330p
C207
C202
0.1u
61
2
C
u1.
0
C201
47p
VREG_MSMP_2.6V
40
2
R
K2.
2
VREG_MSMA_2.6V
VREG_MSMP_2.6V
R217
100
31
2
C
Fu
1
10
2
D
49.9
R214
00
2
C
p7
4
R219
1K
C205
1n
81
2
C
u1.
0
30
2
A
V
C203
22u
70
2
R
I
N
D
R26
0
R220 K0
01
00
2
D
21
2
C
u1.
0
15
00
2
R
U202
4
3
5
2
6
1 D
VCC
CP
NC
GND
Q
91
2
C
u1.
0
TP201
33p
C225
47
R211
DNI
C222
7.5p
C223
C206
0.1u
0.1u
C224
VREG_TCXO_2.85V
C226
33n
2K
R212
19.2MHz
KT3225L19200DCW28RA0
X200
4
2
3
1
VCONT
OUT
GND
VCC
40
2
A
V
50
2
A
V
TP202
TP203
R205
100
TP200
60
2
R
04
06
S
U
B
V_
G
H
C
V
MIC_BIAS
R209
33
U200
M5
Y18
AC19
AF18
Y17
U16
AC18
AF17
W16
AE17
AC17
Y16
AB17
W5
W3
V5
V6
AB9
V9
V8
Y9
W8
AB8
V3
V2
U2
U8
U9
AF4
AE2
AB7
AE4
AE3
AD3
L2
L8
L3
L9
AD2
AC6
AC3
AC2
U15
W15
AC16
AB16
AF15
Y15
AC15
AB15
W14
AE14
AC14
Y14
AC13
U13
Y13
AB13
W13
W12
AB12
Y12
AC12
AC11
AF10
W9
AE10
U12
AF9
AC20
AF20
AB21
AE20
AF21
AF22
AC23
AE23
AC21
AF23
AE21
AB22
AC22
AE24
AE25
AF24
6
M
8
M
9
M
8
E
A
7
F
A
8
C
A
6
F
A
7
C
A
6
E
A
1
1
R
8
1
B
A
8
1
W
1
1
Y
7
1
C
7
1
B
6
1
H
8
1
H
7
1
M
6
2
G
0
1
Y
1
1
T
0
1
W
6
1
E
A
8
F
A
6
1
F
A
5
F
A
3
1
F
2
1
C
2
1
B
1
1
H
1
1
J
2
1
H
2
1
J
1
1
E
2
1
F
1
1
F
2
1
E
9
1
E
A
9
1
F
A
0
2
B
A
5
1
C
6
1
F
3
1
H
4
1
H
4
1
J
3
1
J
1
1
C
4
1
L
3
F
2
F
3
E
2
E
2
D
5
2
G
6
1
L
9
1
C
9
1
B
9
1
H
6
2
F
0
2
H
8
1
J
7
1
J
3
2
H
2
2
F
3
2
F
6
1
J
7
1
E
5
1
J
7
1
F
6
1
B
6
1
C
5
1
H
8
1
B
5
2
B
1
2
F
0
2
B
0
2
F
7
1
H
0
2
E
0
2
C
8
1
C
8
1
F
B21
B22
C21
E21
C22
C24
E26
B24
F25
C26
D26
C23
B23
C25
D25
E23
W20
AD26
N17
T20
J25
M20
N25
V26
H26
L25
P20
U26
V19
AC25
U19
U20
AB23
W25
W26
R19
T19
W22
AC26
V23
AB26
AB25
AA23
AA25
Y26
Y23
T17
Y22
W23
AA26
V20
J26
K20
J20
J23
J22
K19
K26
L22
L19
L23
L20
M19
L26
M26
M22
M23
N26
N19
N20
P26
R26
P19
R25
T26
R22
R23
R20
T23
T22
U25
U23
U22
4
C
6
G
5
G
6
N
3
N
2
N
2
W
6
W
3
M
8
T
2
K
3
K
2
J
3
J
2
H
3
H
2
G
3
G
6
R
2
P
3
P
2
R
3
R
1
1
B
4
1
F
A
3
1
F
A
2
1
F
A
1
1
F
A
5
B
A
3
B
A
2
B
A
3
A
A
2
A
A
2
Y
6
A
A
2
M
3
U
1
1
W
9
E
A
9
C
A
6
B
A
3
Y
7
1
W
9
1
B
A
5
1
E
4
1
C
3
1
C
5
1
B
4
1
B
3
1
B
8
H
6
F
5
F
0
1
J
0
1
H
9
H
0
1
C
0
1
B
9
C
9
B
8
F
8
E
7
F
7
E
7
C
7
B
6
C
5
C
6
B
5
B
P
I
_
R
_
E
N
I
L
N
I
_
R
_
E
N
I
L
P
I
_
L
_
E
N
I
L
N
I
_
L
_
E
N
I
L
P
1
C
I
M
N
1
C
I
M
P
2
C
I
M
N
2
C
I
M
P
I
X
U
A
N
I
X
U
A
P
O
_
E
N
I
L
N
O
_
E
N
I
L
P
O
_
1
R
A
E
N
O
_
1
R
A
E
T
U
O
X
U
A
R
_
H
P
H
L
_
H
P
H
P
M
O
C
C
S
A
I
B
_
C
I
M
F
E
R
V
_
H
P
H
K
L
C
S
Y
S
_
Y
H
P
B
S
U
P
D
_
Y
H
P
B
S
U
N
D
_
Y
H
P
B
S
U
D
I
_
Y
H
P
B
S
U
S
U
B
V
_
Y
H
P
B
S
U
T
X
E
R
_
Y
H
P
B
S
U
N
_
N
I
S
E
R
N
_
T
U
O
S
E
R
N
E
_
G
O
D
W
0
_
E
D
O
M
1
_
E
D
O
M
2
_
E
D
O
M
3
_
E
D
O
M
O
X
C
T
J
D
A
_
O
L
_
K
R
T
K
L
C
_
P
E
E
L
S
I
D
T
S
M
T
N
_
T
S
R
T
O
D
T
K
C
T
K
C
T
R
P
_
A
T
A
D
_
I
D
D
M
N
_
A
T
A
D
_
I
D
D
M
P
_
B
T
S
_
I
D
D
M
N
_
B
T
S
_
I
D
D
M
K
L
C
P
_
C
D
C
L
P
_
T
U
O
_
I
N
_
T
U
O
_
I
P
_
T
U
O
_
Q
N
_
T
U
O
_
Q
F
E
R
_
C
A
D
0
H
C
_
P
I
_
I
0
H
C
_
M
I
_
I
0
H
C
_
P
I
_
Q
0
H
C
_
M
I
_
Q
1
H
C
_
P
I
_
I
1
H
C
_
M
I
_
I
1
H
C
_
P
I
_
Q
1
H
C
_
M
I
_
Q
N
O
_
X
T
J
D
A
_
C
G
A
_
X
T
0
N
O
_
A
P
0
E
G
N
A
R
_
A
P
L
T
C
_
R
W
P
_
A
P
M
_
L
T
C
_
R
W
P
_
A
P
F
E
R
_
G
B
_
M
S
G
0
N
I
A
K
H
1
N
I
A
K
H
2
N
I
A
K
H
EBI1_DQ_0
EBI1_DQ_1
EBI1_DQ_2
EBI1_DQ_3
EBI1_DQ_4
EBI1_DQ_5
EBI1_DQ_6
EBI1_DQ_7
EBI1_DQ_8
EBI1_DQ_9
EBI1_DQ_10
EBI1_DQ_11
EBI1_DQ_12
EBI1_DQ_13
EBI1_DQ_14
EBI1_DQ_15
EBI1_DQ_16
EBI1_DQ_17
EBI1_DQ_18
EBI1_DQ_19
EBI1_DQ_20
EBI1_DQ_21
EBI1_DQ_22
EBI1_DQ_23
EBI1_DQ_24
EBI1_DQ_25
EBI1_DQ_26
EBI1_DQ_27
EBI1_DQ_28
EBI1_DQ_29
EBI1_DQ_30
EBI1_DQ_31
EBI1_ADR_0
EBI1_ADR_1
EBI1_ADR_2
EBI1_ADR_3
EBI1_ADR_4
EBI1_ADR_5
EBI1_ADR_6
EBI1_ADR_7
EBI1_ADR_8
EBI1_ADR_9
EBI1_ADR_10
EBI1_ADR_11
EBI1_ADR_12
EBI1_ADR_13
EBI1_CKE0
EBI1_CKE1
EBI1_DCLK
EBI1_DCLKB
EBI1_WE_N
EBI1_CS0_N
EBI1_CS1_N
EBI1_BA_0
EBI1_BA_1
EBI1_DQS_0
EBI1_DQS_1
EBI1_DQS_2
EBI1_DQS_3
EBI1_DM_0
EBI1_DM_1
EBI1_DM_2
EBI1_DM_3
EBI1_RAS_N
EBI1_CAS_N
EBI1_RESOUT_N
EBI1_CAL
EBI2_DATA_0
EBI2_DATA_1
EBI2_DATA_2
EBI2_DATA_3
EBI2_DATA_4
EBI2_DATA_5
EBI2_DATA_6
EBI2_DATA_7
EBI2_DATA_8
EBI2_DATA_9
EBI2_DATA_10
EBI2_DATA_11
EBI2_DATA_12
EBI2_DATA_13
EBI2_DATA_14
EBI2_DATA_15
0
_
R
D
A
_
2
I
B
E
1
_
R
D
A
_
2
I
B
E
2
_
R
D
A
_
2
I
B
E
3
_
R
D
A
_
2
I
B
E
4
_
R
D
A
_
2
I
B
E
5
_
R
D
A
_
2
I
B
E
6
_
R
D
A
_
2
I
B
E
7
_
R
D
A
_
2
I
B
E
8
_
R
D
A
_
2
I
B
E
9
_
R
D
A
_
2
I
B
E
0
1
_
R
D
A
_
2
I
B
E
1
1
_
R
D
A
_
2
I
B
E
2
1
_
R
D
A
_
2
I
B
E
3
1
_
R
D
A
_
2
I
B
E
4
1
_
R
D
A
_
2
I
B
E
5
1
_
R
D
A
_
2
I
B
E
6
1
_
R
D
A
_
2
I
B
E
N
_
0
S
C
_
2
I
B
E
N
_
1
S
C
_
2
I
B
E
N
_
4
S
C
_
2
I
B
E
N
_
5
S
C
_
2
I
B
E
N
_
6
S
C
_
2
I
B
E
N
_
7
S
C
_
2
I
B
E
K
L
C
_
2
I
B
E
N
_
E
W
_
2
I
B
E
N
_
E
O
_
2
I
B
E
N
_
B
U
_
2
I
B
E
N
_
B
L
_
2
I
B
E
N
_
0
Y
S
U
B
_
2
I
B
E
R
E
P
I
W
R
L
_
S
T
L
L
_
S
T
R
U
_
S
T
L
U
_
S
T
2
3
1
_
O
I
P
G
1
3
1
_
O
I
P
G
0
3
1
_
O
I
P
G
9
2
1
_
O
I
P
G
8
2
1
_
O
I
P
G
7
2
1
_
O
I
P
G
6
2
1
_
O
I
P
G
5
2
1
_
O
I
P
G
4
2
1
_
O
I
P
G
3
2
1
_
O
I
P
G
2
2
1
_
O
I
P
G
1
2
1
_
O
I
P
G
0
2
1
_
O
I
P
G
9
1
1
_
O
I
P
G
8
1
1
_
O
I
P
G
7
1
1
_
O
I
P
G
6
1
1
_
O
I
P
G
5
1
1
_
O
I
P
G
4
1
1
_
O
I
P
G
3
1
1
_
O
I
P
G
2
1
1
_
O
I
P
G
1
1
1
_
O
I
P
G
0
1
1
_
O
I
P
G
9
0
1
_
O
I
P
G
8
0
1
_
O
I
P
G
7
0
1
_
O
I
P
G
6
0
1
_
O
I
P
G
5
0
1
_
O
I
P
G
4
0
1
_
O
I
P
G
3
0
1
_
O
I
P
G
2
0
1
_
O
I
P
G
1
0
1
_
O
I
P
G
0
0
1
_
O
I
P
G
9
9
_
O
I
P
G
8
9
_
O
I
P
G
7
9
_
O
I
P
G
6
9
_
O
I
P
G
5
9
_
O
I
P
G
4
9
_
O
I
P
G
3
9
_
O
I
P
G
2
9
_
O
I
P
G
1
9
_
O
I
P
G
0
9
_
O
I
P
G
9
8
_
O
I
P
G
8
8
_
O
I
P
G
7
8
_
O
I
P
G
6
8
_
O
I
P
G
5
8
_
O
I
P
G
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
GPIO_58
GPIO_59
GPIO_60
GPIO_61
GPIO_62
GPIO_63
GPIO_64
GPIO_65
GPIO_66
GPIO_67
GPIO_68
GPIO_69
GPIO_70
GPIO_71
GPIO_72_GRFC_9
GPIO_73_GRFC_8
GPIO_74_GRFC_7
GPIO_75_GRFC_6
GPIO_76_GRFC_5
GPIO_77_GRFC_4
GPIO_78_GRFC_3
GPIO_79_GRFC_2
GPIO_80_GRFC_1
GPIO_81_GRFC_0
GPIO_82
GPIO_83
GPIO_84
C208
10n
SDRAM_ADDR[13]
T
S
R_
N
O
Pn
S
MT
_
M
S
M
MSM_TMS
O
DT
_
M
S
M
MSM_TDO
I
DT
_
M
S
M
MSM_TDI
PMIC_TCXO
O
X
CT
_
CI
M
P
K
CT
_
M
S
M
MSM_TCK
T
U
O
S
E
R_
G
AT
Jn
nJTAG_RESOUT
KL
C_
P
E
EL
S
K
CT
R_
M
S
M
MSM_RTCK
nRESETOUT
I
B
S
S_
CI
M
P
N
E_
O
X
CT
TCXO_EN
2
E
Wn
2
B
Un
2
E
On
2
BL
n
EBI2_DATA[9]
EBI2_DATA[8]
EBI2_DATA[7]
EBI2_DATA[6]
EBI2_DATA[5]
EBI2_DATA[4]
EBI2_DATA[3]
EBI2_DATA[2]
EBI2_DATA[15]
EBI2_DATA[14]
EBI2_DATA[13]
EBI2_DATA[12]
EBI2_DATA[11]
EBI2_DATA[10]
EBI2_DATA[1]
EBI2_DATA[0]
S
C_
H
S
AL
F_
D
N
A
Nn
Y
D
A
E
R_
H
S
AL
F_
D
N
A
N
nSDRAM_WE
nSDRAM_RAS
SDRAM_DQS3
SDRAM_DQS2
SDRAM_DQS1
SDRAM_DQS0
SDRAM_DQM3
SDRAM_DQM2
SDRAM_DQM1
SDRAM_DQM0
SDRAM_DCLK1
SDRAM_DCLK0
nSDRAM_CAS
SDRAM_BA1
SDRAM_BA0
SDRAM_ADDR[9]
SDRAM_ADDR[8]
SDRAM_ADDR[7]
SDRAM_ADDR[6]
SDRAM_ADDR[5]
SDRAM_ADDR[4]
SDRAM_ADDR[3]
SDRAM_ADDR[2]
SDRAM_ADDR[12]
SDRAM_ADDR[11]
SDRAM_ADDR[10]
SDRAM_ADDR[1]
SDRAM_ADDR[0]
ANT_SEL1
ANT_SEL2
ANT_SEL0
ANT_SEL3
TCXO_RTR_19.2MHZ
P
M
A
R_
A
P_
M
S
G
JTAG_PS_HOLD
MOTION_INT
T
U
O_
X
O
R
P
N
O_
E
NI
L
P
O_
E
NI
L
L_
MF
R_
MF
M
D_
H
B
S
U
P
U
E
K
A
W_
T
S
O
H_
N
AL
W
N_
T
E
S
E
R_
N
AL
W
BT_WAKEUP
MICROSD_DET_N
AUDIO&MOTION_I2C_SDA
REMOTE_PWR_ON
REMOTE_PWR_ON
T
U
O_
X
U
M
A
F
E
R_
C
A
D_
A
P_
M
S
G
TCXO_PM_19.2MHZ
RTR_TRK_LO_ADJ
RTR_TRK_LO_ADJ
P1
_
CI
M
UART3_TX
XT
_3
T
R
A
U
UART3_TX
UART3_TX
UART3_RX
X
R_
3T
R
A
U
UART3_RX
UART3_RX
BT_PCM_CLK
BT_PCM_SYNC
P
D_
H
B
S
U
R_
H
P
H
L_
H
P
H
MMC_CMD
MMC_DATA[0]
MMC_DATA[1]
MMC_DATA[2]
MMC_DATA[3]
MSM_USIM_DATA
MSM_USIM_RST
MSM_USIM_CLK
BT_UART_TXD
BT_UART_RXD
BT_UART_CTS
BT_UART_RTS
CAM_DATA[3]
CAM_DATA[2]
PS_HOLD
PM_INT_N
BT_HOST_WAKEUP
CAM_MCLK
CAM_VSYNC
CAM_HSYNC
AUDIO&MOTION_I2C_SCL
LIN_PWM_FREQ
P_
V
C
R
N_
V
C
R
N
O_
XT
MUIC_I2C_SDA
MUIC_I2C_SCL
MUIC_INT
BT_PCM_DOUT
BT_PCM_DIN
EARJACK_SENSE
A
D
S_
C2I
_
H
C
U
OT
T
NI
_
H
C
U
OT
L
C
S_
C2I
_
H
C
U
OT
LCD_BL_EN
PA_ON1
MMC_CLK
SDRAM_DATA[31]
SDRAM_DATA[30]
SDRAM_DATA[29]
SDRAM_DATA[28]
SDRAM_DATA[27]
SDRAM_DATA[26]
SDRAM_DATA[25]
SDRAM_DATA[24]
SDRAM_DATA[23]
SDRAM_DATA[22]
SDRAM_DATA[21]
SDRAM_DATA[20]
SDRAM_DATA[19]
SDRAM_DATA[18]
SDRAM_DATA[17]
SDRAM_DATA[15]
SDRAM_DATA[14]
SDRAM_DATA[13]
SDRAM_DATA[12]
SDRAM_DATA[11]
SDRAM_DATA[10]
SDRAM_DATA[9]
SDRAM_DATA[8]
SDRAM_DATA[7]
SDRAM_DATA[6]
SDRAM_DATA[5]
SDRAM_DATA[4]
SDRAM_DATA[3]
SDRAM_DATA[2]
SDRAM_DATA[1]
SDRAM_DATA[0]
SDRAM_DATA[16]
nSDRAM_CS0
KL
C
S
Y
S_
H
B
S
U
USBH_SYSCLK
A
D
S
_
C
2
I
_
L
E
U
F
FUEL_I2C_SCL
SDRAM_CKE0
HS_MIC_BIAS_EN
WLAN_CLK
WLAN_CMD
C
I
M
_
S
H
CI
M_
S
H
NT
S
RT
_
M
S
M
MSM_TRSTN
CAM_I2C_SCL
CAM_I2C_SDA
N
_
T
E
S
E
R
_
D
C
L
L
C
S_
C2I
_
S
S
A
P
M
O
C_
X
O
R
P
W
O
L
_
D
I
R
E
K
A
M
_
D
C
L
A
D
S_
C2I
_
S
S
A
P
M
O
C_
X
O
R
P
CAM_DATA[1]
CAM_DATA[0]
N1
_
CI
M
GND|MIC_1N
N
_
T
E
S
E
R
_
T
B
nSDRAM_CS1
SDRAM_CKE1
CAM_RESET_N
CAM_PWDN
CAM_DATA[4]
CAM_DATA[5]
CAM_DATA[6]
CAM_DATA[7]
L
C
S_
C2I
_L
B_
D
CL
A
D
S_
C2I
_L
B_
D
CL
CAM_PCLK
M
_
B
T
S
_
P
_
I
D
D
M
P
_
B
T
S
_
P
_
I
D
D
M
M
_
A
T
A
D
_
P
_
I
D
D
M
P
_
A
T
A
D
_
P
_
I
D
D
M
O
_
C
N
Y
S
V
_
D
C
L
M
COMPASS_DRDY
KEY_COL[2]
KEY_COL[1]
KEY_COL[0]
KEY_ROW[1]
KEY_ROW[0]
WLAN_REG_ON
0
N
O_
A
P
0
R_
A
P
2
N
O_
A
P
F
E
R_
C
A
D
P_I
_
XT
M_I
_
XT
P_
Q_
XT
M_
Q_
XT
P_I
_0
X
R
M_I
_0
X
R
M_
Q_
0
X
R
P_
Q_
0
X
R
P_I
_1
X
R
M_I
_1
X
R
M_
Q_
1
X
R
P_
Q_
1
X
R
GPS_MODE
RTR6285_SSBI
1
R
_
A
P
INTER_RX_SW_SEL_1
INTER_RX_SW_SEL_2
LNA_GAIN_CONTROL
DIVERSITY_LNA_EN
TRK_LO_ADJ
J
D
A_
OL
_
K
RT
WLAN_SDIO[3]
WLAN_SDIO[2]
WLAN_SDIO[1]
WLAN_SDIO[0]
MMC_COVER_DETECT
MOTION_I2C_SCL
MOTION_I2C_SDA
GPS D FLIP-FLOP
MPM Port
Array TP
Clesed to NC7SZ74L8X
Clesed to TCXO
TCXO Circuit
ARM9&ARM11 JTAG
1.0T
0000 : Native, ARM9 on PJTAG, ARM11 on AJTAG
ARM9&ARM11 JTAG
MODE[3:0]
0001 : Native, ARM9 + ARM11 on PJTAG
FFA Rev.C(220Ohm@100MHz)
2010.01.18 updated
NEST JIG
(MIC_1N)
R
X
1
X
_
H
C
U
O
T
U
Y
2
Y
_
H
C
U
O
T
L
X
2
X
_
H
C
U
O
T
D
Y
1
Y
_
H
C
U
O
T
FFA
7
1
p
p
m
)
3
B
(
0
4
5
7
M
P
;
E
S
N
E
S
_
T
A
B
V
REV.E_CHANGED_0517
Содержание LG-P500
Страница 1: ...Service Manual Model LG P500 Internal Use Only Service Manual LG P500 Date September 2010 Issue 1 0 ...
Страница 151: ... 152 LGE Internal Use Only Copyright 2010 LG Electronics Inc All right reserved Only for training and service purposes ...
Страница 181: ... 182 LGE Internal Use Only Copyright 2010 LG Electronics Inc All right reserved Only for training and service purposes ...