3. TECHNICAL BRIEF
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Copyright © 011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
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ͽͶ͑ͺΟΥΖΣΟΒΝ͑ΆΤΖ͑ΟΝΪ͑
͑
3.14 Display
LCD module is connected to Main PCB with 40-pin connector.
The LCD is controlled by CPU Interface in MSM7227.
Figure. Schematic of LCD connector (Main Board)
VREG_LCD_1.8V
FL702
15pF
01
5
6
4
7
3
8
2
9
1
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
1
G
2
G
U701
EUSY0391601
NLSV1T244MUTBG
4
3
5
2
6
1
VCCA
VCCB
A
B
GND
OE_
15pF
FL701
01
5
6
4
7
3
8
2
9
1
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
1
G
2
G
15pF
ICVE10184E150R101FR
FL704
01
5
6
4
7
3
8
2
9
1
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
1
G
2
G
C705
2.2u
FL703
SFEY0010501
15pF
01
5
6
4
7
3
8
2
9
1
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
1
G
2
G
GB042-40S-H10-E3000
ENBY0036001
CN700
21
20
22
19
23
18
24
17
25
16
26
15
27
14
28
13
29
12
30
11
31
10
32
9
33
8
34
7
35
6
36
5
37
4
38
3
39
2
40
1
VREG_LCD_1.8V
FL700
15pF
01
5
6
4
7
3
8
2
9
1
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
1
G
2
G
VA700
VREG_LCD_2.8V
1u
C710
1u
C700
R702
100
VREG_MSMP_2.6V
VREG_LCD_1.8V
01
7
R
K0
01
LCD_RESET_N
EBI2_DATA[0]
EBI2_DATA[1]
EBI2_DATA[10]
EBI2_DATA[11]
EBI2_DATA[12]
EBI2_DATA[13]
EBI2_DATA[14]
EBI2_DATA[15]
EBI2_DATA[2]
EBI2_DATA[3]
EBI2_DATA[4]
EBI2_DATA[5]
EBI2_DATA[6]
EBI2_DATA[7]
EBI2_DATA[8]
EBI2_DATA[9]
nNAND_OE
nNAND_WE
WLED_PWR
MLED[2]
MLED[3]
MLED[1]
MLED[4]
MLED[5]
LCD_RS
LCD_CS
LCD_VSYNC_O
LCD_VSYNC_LS
LCD_VSYNC_LS
LCD_MAKERID_HIGH
LCD Filter(EMI 100 ohm, 15pF)
Maker
IF
Maker ID
TOVIS
H
H