LG Flatron F900B, Руководство по обслуживанию

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TDA4841PS PHLIPS 32P
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FOCUS
HSMOD
HPLL2
HCAP
HREF
HBUF
HPLL1
SGND
VCAP
VREF
VAGC
VSMOD
ASCOR
SDA
SCL
HUNLOCK
HFLB
XRAY
BOP
BSENS
BIN
BDRV
PGND
HDRV
XSEL
Vcc
EWDRV
VOUT2
VOUT1
VSYNC
HSYBC
CLBL
TDA4841PS
Pin Configuration
V-sync
(TTL level)
(TTL level)
(video)
15
25
10
18
19
2
17
16
14
7
H/C-SYNC INPUT
AND POLARITY
CORRECTION
(1) See calculation of f range.
(2) See Figs 22 and 23.
SUPPLY
AND
REFERENCE
HUNLOCK
OUTPUT
VIDEO
CLAMPING
AND V-BLANK
V-SYNC INPUT
AND POLARITY
CORRECTION
V-SYNC
INTEGRATOR
VERTICAL
OSCILLATOR
AND AGC
EHT COMPENSATION
H-SIZE AND V-SIZE
EW-OUTPUT
V-OUTPUT
V-LINEARITY
V-LINEARITY BALANCE
H-PINCUSHION
H-CORNER
H-TRAPEZIUM
H-SIZE
OUTPUT
ASYMMETRIC
EW-CORRECTION
FOCUS
HORIZONTAL
AND VERTICAL
B+
CONTROL
B+ CONTROL
APPLICATION
H-OUTPUT
STAGE
X-RAY
PROTECTION
PLL2, PARALLELOGRAM,
PIN UNBALANCE AND
SOFT START
V-POSITION
V-SIZE, VOVSCN
TDA4841PS
I C-BUS
RECEIVER
2
I C-BUS REGISTERS
HUNLOCK
SDA
SCL
9.2 to 16V
H/C-sync
V+
clamping
blanking
PROTECTION
AND SOFT START
COINCIDENCE DETECTOR
FREQUENCY DETECTOR
PLL1 AND
H-POSITION
HORIZONTAL
OSCILLATOR
12
13
Vout2
Vout1
20 or
32
8
9
XSEL X-RAY HFLB
2 1 30 29
12
2%
1%
nF
10 nF
8.2
3.3
nF
100nF
28 27 26
(1)
R
HBUF
R
HREF
6
4
3
5
(2)
HDRV
23 24 22 21
VSMOD HSMOD
31 11
7V
1.2V
22
1%
5%
100 150
nF
nF
EHT compensaton
EHT compensation
via vertical size
via horizontal size
EWDRV
H
Block Diagram