- 169 -
F
9
LOCATE LEFT OF A1
2
C
A
4
11
E
D
LEFT OF AH1
E
3
9
10
10
5
12
4
7
6
D
A
H
G
H
8
NAND 2G/DDR 1G
11
8
C
1
B
3
12
Changes This PIN MSMP_2.6V
5
B
Near to U201
10
6
C
2
LGE Internal Use Only
E
3
B
ABOVE RIGHT A28
Route together
4
2
BELOW LEFT AH1
Place Close to MSM Pin
Route together
5
Near to U201
5
All VREG_MSMA related decoupling caps should attach to inner GND plane
12
B
G
9
9
11
0603
0603
6
8
7
F
G
D
EBI2_P2 IF NAND 2.6V
A
6
F
C
11
1
8
2
E
A
D
MCP
H
1
12
7
H
4
7
1
3
BELOW AH28
10
MSM7200 Power Part
G
F
VREG_MSME_1.8V
R304
0
TP306
C325
0.1u
1000p
C315
0.1u
C302
VREG_MSME_1.8V
C319
0.01u
C333
C345
1000p
1000p
0.1u
C318
0.01u
C337
C330
VREG_MSME_1.8V
10u
C305
10u
C341
1000p
TP308
M9
VSSQ3
VSSQ4
N10
C10
VSSQ5
D9
VSSQ6
E10
VSSQ7
VSSQ8
F9
VSSQ9
G10
_CAS
H2
B6
_CE
H8
_CK
J2
_CS
G2
_RAS
B3
_RE
_WED
K1
B7
_WEN
C3
_WP
C9
VDDQ5
VDDQ6
D10
E9
VDDQ7
VDDQ8
F10
VDDQ9
G9
B9
VSS0
VSS1
C1
VSS2
H9
VSS3
J1
P9
VSS4
M2
VSS5
VSSN0
C5
P6
VSSN1
J9
VSSQ0
VSSQ1
K10
VSSQ2
L10
NC7
F3
G1
NC8
R_B
C6
B5
VCCN0
N5
VCCN1
B8
VDD0
VDD1
D1
H1
VDD2
VDD3
H10
VDD4
P8
VDD5
M1
VDDQ0
J10
K9
VDDQ1
VDDQ2
L9
M10
VDDQ3
VDDQ4
N9
N8
IO15
N3
IO2
M5
IO3
IO4
P7
M6
IO5
IO6
N6
M8
IO7
P2
IO8
P3
IO9
NC10
M3
NC11
M4
P1
NC16
P10
NC21
NC3
B1
B2
NC4
NC5
B10
G7
DQ9
DQM0
J8
G6
DQM1
DQM2
F8
E7
DQM3
DQS0
J7
DQS1
G5
H7
DQS2
DQS3
E5
IO0
N1
N2
IO1
IO10
N4
IO11
P4
IO12
P5
IO13
N7
M7
IO14
DQ22
E6
F7
DQ23
F6
DQ24
D5
DQ25
DQ26
E8
DQ27
D6
D8
DQ28
DQ29
D7
DQ3
L7
DQ30
C8
DQ31
C7
K8
DQ4
DQ5
L8
DQ6
K7
DQ7
K5
DQ8
K6
R10
DNU6
DQ0
L4
L5
DQ1
DQ10
J6
DQ11
J5
DQ12
H6
H5
DQ13
DQ14
J4
G3
DQ15
G4
DQ16
F4
DQ17
DQ18
E4
F5
DQ19
DQ2
L6
H3
DQ20
H4
DQ21
A6
E1
D3
A7
E2
A8
A9
D4
ALE
C4
BA0
J3
BA1
K2
CK
G8
E3
CKE
B4
CLE
DNU0
A2
A9
DNU1
DNU2
A10
R1
DNU3
DNU4
R2
DNU5
R9
HYH0SSJ0MF3P-5L60E
K4
A0
L1
A1
K3
A10
A11
F2
F1
A12
A2
L2
L3
A3
A4
C2
D2
A5
0.01u
VREG_MSMP_2.6V
U302
VREG_MSME_1.8V
C326
VREG_MSMC1_1.2V
VREG_MSMC2_1.2V
0.1u
C307
C313
10u
10u
TP301
AH27
VSS_THERMAL8
AH28
VSS_THERMAL9
C2
VSS_TOUCH_G
C335
VSS_PLL_G5
Y5
C28
VSS_SMIC_G0
VSS_SMIC_G1
L28
R28
VSS_SMIC_G2
VSS_SMIC_G3
V28
VSS_SMIC_G4
AF28
A1
VSS_THERMAL0
A2
VSS_THERMAL1
VSS_THERMAL10
B1
VSS_THERMAL11
B28
VSS_THERMAL2
A27
VSS_THERMAL3
A28
VSS_THERMAL4
AG1
VSS_THERMAL5
AG28
VSS_THERMAL6
AH1
AH2
VSS_THERMAL7
VSS_EBI_1P_2
A15
A17
VSS_EBI_1P_3
A19
VSS_EBI_1P_4
A20
VSS_EBI_1P_5
A24
VSS_EBI_1P_6
E28
VSS_EBI_1P_7
F28
VSS_EBI_1P_8
VSS_EBI_P2_0
N28
VSS_EBI_P2_1
U28
VSS_EBI_P2_2
AA28
AE15
VSS_MDDI_G
VSS_PLL_G0
V1
VSS_PLL_G1
V4
W1
VSS_PLL_G2
VSS_PLL_G3
W4
VSS_PLL_G4
Y4
AH3
VSS_DIG70
VSS_DIG71
AH4
VSS_DIG72
AH5
VSS_DIG73
AH7
VSS_DIG74
AH9
AH10
VSS_DIG75
AH11
VSS_DIG76
AH12
VSS_DIG77
VSS_DIG78
AH17
AH19
VSS_DIG79
VSS_DIG8
A10
AH21
VSS_DIG80
VSS_DIG81
AH24
VSS_DIG9
G28
A11
VSS_EBI_1P_0
A12
VSS_EBI_1P_1
VSS_DIG56
W28
VSS_DIG57
Y1
Y28
VSS_DIG58
VSS_DIG59
AA1
VSS_DIG6
E24
AA8
VSS_DIG60
VSS_DIG61
AB1
AB28
VSS_DIG62
AB7
VSS_DIG63
AC1
VSS_DIG64
VSS_DIG65
AD28
VSS_DIG66
AD5
VSS_DIG67
A18
VSS_DIG68
AE4
AF1
VSS_DIG69
VSS_DIG7
G22
R16
VSS_DIG41
R17
VSS_DIG42
VSS_DIG43
T12
VSS_DIG44
T13
T14
VSS_DIG45
T15
VSS_DIG46
T16
VSS_DIG47
A16
VSS_DIG48
VSS_DIG49
T17
VSS_DIG5
D28
VSS_DIG50
U12
VSS_DIG51
U13
VSS_DIG52
U14
VSS_DIG53
U15
VSS_DIG54
U16
VSS_DIG55
U17
VSS_DIG27
N15
VSS_DIG28
N16
N17
VSS_DIG29
VSS_DIG3
D10
P12
VSS_DIG30
VSS_DIG31
P13
P14
VSS_DIG32
P15
VSS_DIG33
P16
VSS_DIG34
VSS_DIG35
P17
VSS_DIG36
P28
R12
VSS_DIG37
R13
VSS_DIG38
R14
VSS_DIG39
D25
VSS_DIG4
R15
VSS_DIG40
J28
VSS_DIG12
VSS_DIG13
K28
VSS_DIG14
L1
L18
VSS_DIG15
VSS_DIG16
M13
VSS_DIG17
M14
M15
VSS_DIG18
M16
VSS_DIG19
VSS_DIG2
A22
VSS_DIG20
M17
VSS_DIG21
M18
M28
VSS_DIG22
VSS_DIG23
N1
VSS_DIG24
N12
VSS_DIG25
N13
VSS_DIG26
N14
VDD_TXDAC
R2
VSS_ANALOG_G0
D8
VSS_ANALOG_G1
D9
F4
VSS_ANALOG_G2
VSS_ANALOG_G3
R1
VSS_ANALOG_G4
T1
U1
VSS_ANALOG_G5
F5
VSS_BBR_G0
VSS_BBR_G1
H8
J1
VSS_BBR_G2
VSS_BBR_G3
J5
VSS_CODEC_G
D4
VSS_DIG0
A3
VSS_DIG1
A4
H21
VSS_DIG10
VSS_DIG11
H28
AF27
VDD_SMIC0
C27
VDD_SMIC1
L27
VDD_SMIC2
VDD_SMIC3
R27
VDD_SMIC4
V27
AB27
VDD_SMIP0
AD27
VDD_SMIP1
D27
VDD_SMIP2
G27
VDD_SMIP3
VDD_SMIP4
H27
VDD_SMIP5
K27
P27
VDD_SMIP6
R18
VDD_SMIP7
W27
VDD_SMIP8
VDD_TS
B2
VDD_TV_OUT_DAC
U2
VDD_HPH
E9
AD15
VDD_MDDI
VDD_P3_0
AB2
VDD_P3_1
AE2
AG19
VDD_P3_2
AG21
VDD_P3_3
AG3
VDD_P3_4
VDD_P3_5
AG9
E10
VDD_P4_0
VDD_P4_1
N2
VDD_P8
K2
T2
VDD_PA_CTL_DAC
V2
VDD_PLL0
V5
VDD_PLL1
VDD_PLL2
W2
VDD_PLL3
W5
B3
VDD_DIG_8
VDD_DIG_9
J27
VDD_EAR
E8
VDD_EBI1_P1_0
A25
B11
VDD_EBI1_P1_1
N27
VDD_EBI1_P1_10
VDD_EBI1_P1_11
U27
B12
VDD_EBI1_P1_2
B15
VDD_EBI1_P1_3
VDD_EBI1_P1_4
B17
B19
VDD_EBI1_P1_5
VDD_EBI1_P1_6
B20
VDD_EBI1_P1_7
E27
VDD_EBI1_P1_8
F27
VDD_EBI1_P1_9
AA27
P8
VDD_EFUSE_PROG
J4
VDD_BBR3
AE27
VDD_C1_SENSE
VDD_C2_SENSE
AF2
VDD_CDC
D5
AG12
VDD_DIG_0
VDD_DIG_1
AG17
VDD_DIG_10
L2
M27
VDD_DIG_11
VDD_DIG_12
Y2
VDD_DIG_13
Y27
VDD_DIG_2
AG20
VDD_DIG_3
AG24
B10
VDD_DIG_4
VDD_DIG_5
B16
B18
VDD_DIG_6
VDD_DIG_7
B22
VDD_ARM11_DIG0
AA2
VDD_ARM11_DIG1
AC2
VDD_ARM11_DIG2
AG10
VDD_ARM11_DIG3
AG11
AG2
VDD_ARM11_DIG4
AG4
VDD_ARM11_DIG5
AG5
VDD_ARM11_DIG6
AG7
VDD_ARM11_DIG7
H1
VDD_BBR0
VDD_BBR1
H2
VDD_BBR2
J2
MSM7201A_POWER
U202-2
2.2u
C308
0
R303
TP305
VREG_AUX2_2.85V
C320
0.1u
C311
2.2u
DNI
10K
R301
0.1u
R302
VREG_MSMA_2.6V
C312
VREG_MSMC2_1.2V
0.01u
C328
C321
10u
C327
VREG_MSMP_2.6V
VREG_MSMC1_1.2V
0.1u
0.1u
C336
TP304
0.1u
C316
0.1u
VREG_MSME_1.8V
C301
C332
VREG_MSME_1.8V
0.1u
C342
1000p
1000p
C309
0.1u
C306
0.01u
C346
VREG_MSMA_2.6V
VREG_MSMA_2.6V
C303
2200p
C338
0.1u
0.1u
C323
C344
C317
1000p
0.01u
2.2u
TP303
C329
C334
1000p
C331
0.1u
C310
0.1u
C324
VREG_MSMA_2.6V
0.01u
2.2u
C304
1000p
0.01u
C314
C339
VREG_MSME_1.8V
0.1u
C340
C322
0.01u
VREG_MSME_1.8V
VREG_MSME_1.8V
C343
0.1u
VSNS_MSMC1_1.2V
VSNS_MSME_1.8V
VSNS_MSMC2_1.2V
SDRAM_ADDR4
SDRAM_ADDR7
SDRAM_ADDR8
SDRAM_D4
nOE2
nUB2
nRESETOUT1
SDRAM_CLK0
SDRAM_CKE
nSDRAM_CAS
nSDRAM_CS
nSDRAM_RAS
nSDRAM_WE
SDRAM_CLK1
nWE2
nLB2
nNAND_FLASH_CS
NAND_FLASH_READY
SDRAM_D11
SDRAM_D12
SDRAM_D13
SDRAM_D14
SDRAM_D15
SDRAM_D17
SDRAM_D19
SDRAM_D2
SDRAM_D20
SDRAM_D21
SDRAM_D22
SDRAM_D23
SDRAM_D24
SDRAM_D25
SDRAM_D26
SDRAM_D27
SDRAM_D28
SDRAM_D29
SDRAM_D3
SDRAM_D30
SDRAM_D31
SDRAM_D5
SDRAM_D6
SDRAM_D7
SDRAM_D8
SDRAM_D9
SDRAM_D0
SDRAM_D16
EBI2_DATA[5]
EBI2_DATA[6]
SDRAM_ADDR0
SDRAM_ADDR2
SDRAM_BA0
SDRAM_BA1
SDRAM_DQS0
SDRAM_DQS1
SDRAM_DQS2
SDRAM_DQS3
EBI2_DATA[15]
EBI2_DATA[14]
EBI2_DATA[13]
EBI2_DATA[12]
EBI2_DATA[11]
EBI2_DATA[10]
EBI2_DATA[9]
EBI2_DATA[8]
EBI2_DATA[7]
EBI2_DATA[4]
EBI2_DATA[3]
EBI2_DATA[2]
EBI2_DATA[1]
EBI2_DATA[0]
SDRAM_D10
SDRAM_ADDR1
SDRAM_ADDR3
SDRAM_ADDR5
SDRAM_ADDR6
SDRAM_ADDR9
SDRAM_ADDR10
SDRAM_ADDR11
SDRAM_ADDR12
SDRAM_DQM0
SDRAM_DQM1
SDRAM_DQM2
SDRAM_DQM3
RTR_DAC_REF
SDRAM_D1
SDRAM_D18
7. CIRCUIT DIAGRAM
LGE Internal Use Only
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Содержание CT815
Страница 1: ...Date May 2009 Issue 1 0 Service Manual Model CT815 Service Manual CT815 Internal Use Only ...
Страница 165: ... 166 LGE Internal Use Only Copyright 2009 LG Electronics Inc All right reserved Only for training and service purposes ...
Страница 173: ... 174 LGE Internal Use Only Copyright 2009 LG Electronics Inc All right reserved Only for training and service purposes ...
Страница 177: ... 178 LGE Internal Use Only Copyright 2009 LG Electronics Inc All right reserved Only for training and service purposes ...
Страница 221: ...Note ...
Страница 222: ...Note ...