- 137 -
Copyright © 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
7. CIRCUIT DIAGRAM
R357
47
R360
47
47
R361
R363
47
47
R362
47
R364
C235
1u
VA301
VA302
VA304
VIO_2V8
LD300
LD301
LD302
LD303
LD304
LD305
22n
L301
R221
1M
VA305
VA306
C307
1u
VMMC_3V3
C270
1u
J301
12
10
11
9
5
4
6
3
7
2
8
1
DAT2
DAT1
CD/DAT3 DAT0
CMD
VSS
VDD
CLK
GND1
POL
GND2
DET
VA307
1u
C353
C355
1u
C322
1u
VB300
2
1
C356
2.2u
C351
2.2u
1
2
VMMC_3V
3
VIO_1V
8
R351
1K
1u
C354
1
2
C357
2.2u
1
2
VBAT
U302
21
20
19
18
8
7
6
5
9
4
10
3
11
2
12
1
13
14
15
16
17
LED3
LED4
NC2
LDO2
AVIN
C1N
LDO1
C2N
AGND
PGND
NC1
C2
P
ENA
C1P
PVIN
SCL
SDA
LED2
LED1
VOUT
SLUG_G
C352
33p
VBAT
VFM_2V
8
C309
1u
VIO_2V8
VIO_1V8
VA331
VA332
C32
6
0.1
u
1
2
VIO_1V8
10K
R367
R365
680
C265
1u
C360
2.2u
C308
1u
VA324 VA325 VA326
VA321
VA322
680
R366
VA323
VA309
VA311
VA310
VA308
VA328
VA327
VA329
D301
VA330
SW300
S1
3
4
5
6
S2
1
R354
2
1
1
R355
2
1
VBAT
KB300
2
1
680
R301
10
R358
2
1
10
R359
2
1
C361
DNI
1
2
C364
7.5p
1
R353
VA320
VA319
VA318
LD307
3
2
1
4
R
G
B
L302
270n
R302
680
R303
680
VCAM_2V
8
7.5p
C362
1
2
7.5pF
FL301
10
5
6
4
7
3
8
2
9
1
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
G1
G2
680
R316
680
R304
1u
C319
680
R31
7
C363
DNI
KB316
2
1
R309
680
R30
6
680
R30
5
680
CN301
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
C32
4
0.1
u
1
2
0.1u
C32
5
1
2
VCAMD_IO_1V
8
VBAT
VA313
1u
C300
1
2
C301
1u
1
2
VA312
2
1
FL300
7.5pF
10
5
6
4
7
3
8
2
9
1
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
G1
G2
CN302
13
12
14
11
15
10
16
9
17
8
18
7
19
6
20
5
21
4
22
3
23
2
24
1
C31
6
1u
1
2
KB306
KB305
KB302
KB301
2
1
KB319
KB312
KB311
KB320
KB318
KB310
KB303
KB304
KB315
KB313
KB317
KB309
KB308
C31
7
1u
C31
5
1u
C305
2.2u
KB307
VA303
KB314
100K
R311
DNI
R307
2
1
R312
100K
2
1
VIBR_3V0
VIO_1V8
100K
R308
VBAT
FL302
7.5pF
10
5
6
4
7
3
8
2
9
1
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
G1
G2
R318
68
0
VA314
VA315
2
1
CAM_DATA00
CAM_DATA01
CAM_DATA02
CAM_PCLK
CAM_MCLK
CAM_DATA06
CAM_DATA07
END_KEY
CAM_RESET
CAM_DATA03
CAM_DATA04
CAM_DATA05
LCD_RS
CAM_HSYNC
CAM_VSYNC
CAM_PD
MSD_D[1]
MSD_D[0]
MSD_D[3]
MSD_CMD
MSD_CLK
LCD_VSYNC
MSD_D[2]
KEY_ROW0
KEY_ROW2
LCD_ID
I2C_SDA1
I2C_SCL1
I2C_SDA2
I2C_SCL2
KEY_COL0
KEY_COL1
KEY_COL2
KEY_ROW1
KEY_ROW4
KEY_ROW4
KEY_ROW3
KEY_COL3
KEY_COL4
KEY_COL4
MSD_DET_N
LCD_LED_CA1
LCD_LED_CA1
LCD_LED_CA2
LCD_LED_CA2
LCD_LED_CA3
LCD_LED_CA3
CAM_F_PCLK
CAM_F_PCLK
CAM_F_MCLK
CAM_F_MCLK
LNAND_D_[00]
LNAND_D_[01]
LNAND_D_[02]
LNAND_D_[03]
LNAND_D_[04]
LNAND_D_[05]
LNAND_D_[06]
LNAND_D_[07]
LCD_WR_N
LCD_CS_N
LCD_RST_N
LCD_RD_N
GLED_EN
BLED_EN
RLED_EN
KEY_BL0
(10/12) Changed
Changed (8/8)
SD Header socket changed (10/31)
(7/3) R221 : 1Mohm
SD Header Socket
Changed (10/30)
POL pin function check!!
LCD Charge Pump
(10V)
(10/12) Changed
Changed (8/8)
Changed (10/30)
NP0 --> X7R (8/27)
Added for NC pin (8/21)
Changed for ESD (8/21)
Added for ESD (8/21)
Added (10/31)
Added (10/30)
Beads are deleted (12/3)
VCAMD & VIO are merged to VCAMD_IO_1V8 (10/31)
Location is changed for RSE (11/9)
VCAM_AVD
D
VCAM_IOVDD
VCAM_DVDD
Changed (12/29)
Changed (12/29)
Changed (12/29)
Changed (9/10)
Added (9/10)
IF_MODE[1:0] = 01 --> 00
D[15:0] 16 bit --> D[7:0] 8 bit mode
Changed (9/10)
Changed from D[15:8] to D[7:0]
IM0
IM1
Added (9/10)
Added (9/10)
Changed (9/10)
SIM1 = BLED_EN
SIM2 = RLED_EN
SIM3 = GLED_EN
Quad SIM Setting is TBD (10/12)
SW1
SIM Indicator
SW1 key (KCOL0, KROW0 pin) for emergency download
KEYPAD INTERFACE
SW2
SEND
RIGHT
LEFT
OK
DOWN
UP
SHARP
NUM 0
STAR
NUM 9
NUM 8
NUM 7
NUM 6
NUM 5
NUM 4
SIM4 = TBD
NUM 3
NUM 2
NUM 1
WHITE Top View LED (8/13)
KEY BACKLIGHT
VIBRATOR
Camera (1.3M) needs to be checked
END
LCD INTERFACE CONNECTOR
(DIF_D8)
TIANMA LCD ID : HIGH
SIM Selection KEY
(6/20) Current circuit is designed from QCIF of A2.
Must check QVGA pinmap
7/25