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LGE Internal Use Only
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Block Diagram
1. M16 + F16 Circuit Block Diagram
Audio 2
AM
P
(NTP7515)
M1
6
CI
Slot
P_
TS
P_
TS
IF
(+/-
)
USB1 (3.0
)
OP
TIC
LA
N
HD
MI
1 HD
MI
2.
0
EEPR
OM
(NVR
AM
)
(256Kb
)
HDM
I
Ai
r/
Cabl
e
TUNE
R
(T2/C/
A)
TUNE
R
(S2)
DVB-
S
DE
MO
D
(S2)
LN
B
USB2 (2.0
)
51P/41P
eMMC (4GB
)
Sub
Mi
co
m
(RENES
AS
R5F100GE
AF
B)
DDR3
186
6X
16
(512
MB
X 2E
A)
P_
TS
X_
TA
L
24M
Hz
T2
/C/S2
W/
O
AD
LM
GM
X_
TA
L
32.768KH
z
I2S
Ou
t
I2C
0
Vx
1
US
B
I2C
4
(H
W
Port
)
CO
MP
OC
P
R E A R
YP
bP
r
CVBS
/L/R
SPDIF
OU
T
ET
HERNE
T
I2C
2
(H
W
Port
)
SU
B
AS
SY
IR
/ KEY/EY
E
WI
FI/B
T Co
mb
o
USB_
WI
FI
CVBS
SM
AR
TC
AR
D_
I/F
B-CA
S
B-CA
S
(JAP
AN
)
DDR3
2133
X 16
(512
MB
X 2E
A)
HD
MI
3(External
EDID
)
USB3 (2.0
)
F1
6
DDR3 2133
X
16
(128
MB
X 3E
A)
RS232C/
HP
HD
MI
2(AR
C)
HD
MI
2.
0
S_
TS
for
JP
AV
RTL8 201F
Vx
1
OC
P
OC
P
LOCA
L
DI
MM
IN
G
VS/SCLK/
MO
SI
AM
P TI
UA
RT
RX
/TX
X_
TA
L
25M
Hz
I2C
Содержание 65UH9500
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