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Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
[ST_GPIO_05_IR_R
X]
[ST_GPIO_00_WO
L_
WA
KE_UP]
WO
L/
ETH_PO
WE
R_ON
USB_CTL2
K3Lp
MICOM
USB2_2.0 OCP
USB2
[RTC_XO_US
BOCD0]
[GPIO_79_U
SB_PWR0_
SD_WP]
IN
STANT_BOOT
/U
SB_O
CD
2
USB_CTL3
USB3_2.0 OCP
USB3
[RTC_XI_US
BOCD1]
[GPIO_78_US
B_PWR1_SD_CD]
/U
SB_O
CD
3
[R
ST
]
SO
C_R
ESET
[AH16,
AH
17,A
G1
6,AG17
,A
J1
6]
BIT0~4
HW option
AD
C 1~5
[GPIO_119_PC_RST]
PC
M_R
ESET
CI_SLOT
CI power
enable
control
[AIO2R_C
MD_VCC
_SC]
PCM
_5V_CTL
Pa
nel
[GPIO_4_VBY_HTPD/TCON_14
]
EPI_
MC
LK
[GPIO_5_VBY_LOCK/EPLOCK]
LOCKAn
[GPIO7_P
MIC_
RESET]
PM
IC
_RESET
PMIC
[GPO011_PWM
_DIM
_1]
[GPIO010_PWM
_DIM
_0]
PW
M_DI
M2
POWER
PW
M_DI
M
[GPO012_LD_SPI1_SCK]
L/DI
M_
M0_SCL
K
[GPO013_LD_SPI1_SDO]
L/DI
M_
M0_MOSI
[GPO014_LD_SPI1_SYNC]
L/DI
M_
M0_VS
EPI_GC
LK
[GPO_1_TCON_I2C_EN/TCON_
2]
[VINBN_VIDCOR
E]
VID_CO
RE
CORE
DCDC
[VINR
P_
TUNE
R0_REST]
/TU_R
ESET1
Tuner
/T
U_RESET2
[VINGP_DEM
OD_RESET]
[AI2L_AM
P_RESET
_N]
AM
P_RESET_N
Audi
o
AM
P
[AI3R_CO
MP
1_DE
T]
COMP1_DET
Component/
AV
J
ack
[AIO1L_AV1_C
VBS_
DET]
AV1_CVBS_DET
[VDBSOUT_SC_PWR_SEL]
SM
ARTCARD_PW
R_SE
L
Japan
B-CA
S
[AIO2L_H
P_
DET]
HP_DET
H/P Jack
9. GPIO(K3Lp)
Содержание 55UJ630V
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