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Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
BLOCK DIAGRAM
AV1_Audio
AV2_Audio
MNT_Audio
HDMI
(PC/DTV)
Comp2_Audio
RGB_Audio
Comp1_Audio
[L1 / R1]
[L2 / R2]
[L3 / R3]
[L4 / R4]
[L5 / R5]
Switch
Switch
[Rout/Lout]
I2C SCL/SDA
Audio
Switch
[TEA6420]
AUDIO ADC
[CS5340]
I2S_CLK_IN/DATA_IN
/LR IN
(I2S_MCLK)
SPDIF OUT
Buffer
Buffer
OP AMP
[MC33078]
PWM MODULATOR/
POWER AMP
[NTP3000]
SIF IN
Broadcom
[BCM3553]
AUD_SPDIF
ANA L/R IN
ANA L/R
(MC33078)
ANA L/R
ANA L/R OUT
(CS5340)
BCM_MCLK
BCM_MCLK
I2S_CLK_IN
I2S_DATA_IN
I2S_LR_IN
RESET
RESET
I2S_CLK_OUT
I2S_DATA_OUT
I2S_LR_OUT
(NTP3000)
I2S_CLK_OUT/
DATA_OUT/
LRCH OUT
I2C SCL/SDA
OUT1A/B
OUT2A/B
SPK R
SPK L
MNT_L/R OUT
HDMI Rx
Built in Internal
I2S/SPDIF Convert
HDMI_TMDS 0/1/2/CLK
TUNER (ATSC/NTSC )
I2C SCL/SDA
Buffer
Buffer
SIF
IF_P
IF_N
AUD_LEFT/RIGHT P
HDMI_RX_DATA/CLK
ANA L/R OUT
BTSC
Decoder
MPEG2
Dolby
AUDIO
Processor
Signal path for AUDIO/ IF
SPDIF OUT(coaxial)
BCM_MCLK
IF AGC
CVBS
FRONT END
Содержание 50PY3D 60PY3D
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