55. . Tuner/CI Block Diagram
Tuner/CI Block Diagram
TDJM-G251D
+3.3V_NORMAL
10 [TONECTRL]
CI Slot
[+3.3V_TUNER] 11
[+3.3V_DEMOD_TU] 26
[1,1V_D_Demod_Core] 28
+1.1V_Demod_Core
[+3.3V_LNA_TU] 1
[LNB TX] 29
LNB_TX
+3.3V_NORMAL
1.8K
Ω
LM14
LNB
IC1800
A8303SESTR-TB
10 [TONECTRL]
2 [LNB]
7 [SCL]
8 [SDA]
W5[SCK2]
W6 [SDA2]
/CI CD1
CI 5V
Power detect
PCM_5V_CTL
+5V_CI_ON
10K
Ω
VCC
N6[GPIO_PM4]
+5V_CI_ON
[LNB_TX] 29
[LNB_OUT] 31
[I2C_SCL2_TU] 27
[I2C_SDA2_TU] 30
I2C_SCL2
I2C_SDA2
33
Ω
33
Ω
LNB_OUT
CAM_CD1_N
AJ15[TS0CLK]
AH16(TS0SYNC]
AH17[TS0VALID]
EB BE N1
EB_BE_NO
/PCM_CE1
/CI_CD1
/CI_CD2
CI_CD1
CI_CD2
AH12[PCMCD]
CI_MISTRT
CI_MIVA_ERR
CI_MCLKI
AK18[PCMCEN]
PCM_CE1
AJ11[PCMIOWR]
CI_IOWR
[FE_DEMOD1_TS_ERROR_TU] 12
[FE_DEMOD1_1_TS_CLK] 14
[FE_DEMOD1_TS_SYNC] 15
[FE_DEMOD1_TS_VAL] 16
FE DEMOD1 TS DATA[0] 17
[I2C_SCL5_TU] 4
[I2C_SDA5_TU] 5
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
I2C_SCL5
I2C_SDA5
33
Ω
U6[SCK5]
T4 [SDA5]
OR
GATE
AH13~AH15
[TS0DATA[0-7]
CAM WAIT N
PCM_RESET
EB_DATA[0-7]
CI_DATA[0-7]
EB_ADDR[0-14]
CI_ADDR[0-14]
EB_BE_N1
AJ14[PCMIORD]
CI_IORD
AM23-AM16
AL21-AJ12
CI_ADDR[0-14]
EB_DATA[0-7]
AL18[PCM_RST]
PCM_RESET
FE_DEMOD1_TS_DATA[0] 17
FE_DEMOD1_TS_DATA[1] 18
FE_DEMOD1_TS_DATA[2] 19
FE_DEMOD1_TS_DATA[3] 20
FE_DEMOD1_TS_DATA[4] 21
FE_DEMOD1_TS_DATA[5] 22
FE_DEMOD1_TS_DATA[6] 23
FE_DEMOD1_TS_DATA[7] 24
FE_DEMOD1_TS_DATA [0-7]
E11 [GPIO152]
/EB_WE_N
/EB_OE_N
CAM_IREQ_N
CAM_REG_N
CAM_WAIT_N
CI TS CLK
TPI CLK
AL19[PCMWAIT]
AK20[PCMREG]
AL17[PCMIRQA]
AG10[PCMOEN]
AK16[[PCMWEN]
CAM_WAIT_N
REG
CAM_IREQ_N
CI_OE
CI_WE
[RF_SWITCH_CTL] 2
RF_SWITCH_CTL
/TU_RESET1
AL7 [VIFP]
AM7 [VIFM]
AL6[SIFP]
33
Ω
CI_MDI[0-7]
33
Ω
FE_DEMOD1_TS_DATA[0-7]
TPI_DATA[0-7]
CI_TS_SYNC
CI_TS_VAL
CI_TS_CLK
TPI_SOP
TPI_VAL
TPI_CLK
TS_IN[0-7]
AJ18~AJ21
[TPI_DATA[0-7]]
TS_OUT[0-7]
AG19[TS1CLK]
AH20[TS1VALID]
AG18[TS1SYNC]
TS_OUT_CLK
TS_OUT_VAL
TS_OUT_SYNC
[IF_P] 6
[IF_N] 7
[TU_SIF_TU] 9
[TU_CVBS_TU] 8
[/TU_RESET1_TU] 25
FILTER
IF_P
IF_N
TUNER_SIF
TU_CVBS
IF AGC
ADC_I_INP
ADC_I_INN
B4 [GPIO66]
AF4[CVBS0]
TPI_DATA[0-7]
AH13~AH15
[TS0DATA[0 7]
[IF_AGC_TU] 3
IF_AGC
AM5[IF_AGC]
[TS0DATA[0-7]
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Содержание 49UB8200
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