LG 42LV375H, Руководство по обслуживанию

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54MHz_XTAL_N
54MHz_XTAL_P
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BLM18PG121SN1D
L202
0 . 0 1 u F C213
A3.3V A2.5V
0.1uF
C219
0.1uF
C214
560 R220
A1.2V
0 . 1 u F C215
0.1uF
C223
+3.3V_NORMAL
1.5K R201 1.5K R200
BLM18PG121SN1D
L200
A2.5V
0.1uF
C209
3.9K
R209
100pF
C201
120
R210
A1.2V
0.1uF
C207
0.1uF
C203
0.1uF
C202
A3.3V
240
R218
1K
R219
0 . 1 u F
C222
A2.5V
0.1uF
C295
A2.5V A1.2V
0.1uF
C236
0.1uF
C239
A1.2V
0.1uF C9202
54MHz_XTAL_P
0.1uF C251
54MHz_XTAL_N
A2.5V
A1.2V
BLM18PG121SN1D
L203
0 . 1 u F
C233
+3.3V_NORMAL
A2.5V
+3.3V_NORMAL
0 . 1 u F
C234
SYS_RESETb
BLM18PG121SN1D
L204
A1.2V
A1.2V
BLM18PG121SN1D
L207
0.1uF C237
1K R222
1K R262
4.7K
R221
BLM18PG121SN1D
L211
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA0_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA1_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_1_CLK_P
LVDS_TX_0_DATA2_N
LVDS_TX_1_CLK_N
LVDS_TX_0_DATA4_P
LVDS_TX_1_DATA4_P
LVDS_TX_0_DATA2_P
LVDS_TX_1_DATA3_P
LVDS_TX_0_CLK_N
LVDS_TX_0_DATA4_N
LVDS_TX_0_CLK_P
LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA1_N
LVDS_TX_0_DATA3_N
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA2_N
LVDS_TX_0_DATA0_N
SC1_LR_INCM
51 R233
51 R230
51 R234
51 R229
COMP2_LR_INCM
SC1_L_IN
51 R228
PC_LR_INCM
PC_R_IN
SC1_R_IN
PC_L_IN
51 R215
0.1uF C238
D3.3V
2.7K
R235
TJC2508-4A
P200
1
2
3
4
A1.2V
390
R240
OPT
604 R243
1008LS-272XJLC
L208
33pF
C257
22
R212
22
R211
12pF
C229
12pF
C230
34 R245
34 R251
COMP2_VID_INCM
TU_CVBS_INCM
5 . 1
R257
B_VID_INCM
5 . 1
R259
5 . 1
R252
0 . 1 u F C9206
0 . 1 u F C9205
0 . 1 u F C258
0 . 1 u F C262
R_VID_INCM
34 R248 34 R244
0 . 1 u F C264
34 R246 34 R247
0 . 1 u F C9209
COMP2_LR_INCM
G_VID_INCM
PC_LR_INCM
0 . 1 5 u F
C265
0 . 1 5 u F
C9212
0 . 1 5 u F
C269
A2.5V
A1.2V
EPHY_RDP
0 . 1 u F
16V
C244
BLM18PG121SN1D
L210
0.1uF
C247 0.1uF C9210
EPHY_RDN
BLM18PG121SN1D
L209
BLM18PG121SN1D
L212
CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
C I _ A [ 1 4 ]
SC1_CVBS_INCM
0 . 1 u F C9201
34 R260
FE_TS_DATA_CLK
FE_TS_SERIAL
FE_TS_SYNC
TU_SIF_INCM
SC1_LR_INCM
SC1_RGB_INCM
1K R249
SIDE_USB_DM
SIDE_USB_DP
COMP2_L_IN
COMP2_R_IN
DTV/MNT_V_OUT
4.7uF
C212
4.7uF
C9218
4.7uF
C208
4 . 7 u F
C9216
4.7uF C9211
4.7uF
C9208
10uF
C217
10uF
C228 OPT
4.7uF
C242
4.7uF
C9203
4 . 7 u F
C235
4.7uF
C241 4.7uF
C240
10uF
C231
0 . 4 7 u F
C270
0 . 4 7 u F
C9215
0 . 4 7 u F
C9200
75
R238
0
R236
0
R237
RMX0_CLK
RMX0_DATA
RMX0_SYNC
22
R9200
22
R9201
22 R9202
0 . 0 1 5 u F C227
0 . 0 1 5 u F C226
0 . 0 1 5 u F C211
0 . 0 1 5 u F C220
0 . 0 1 5 u F C232
0 . 0 1 5 u F C221
0.047uF
C296
0.047uF
C254
0.047uF
C299
0.047uF
C279
0.047uF
C256
0.047uF
C298
0.047uF
C273
0.047uF
C252
0.047uF
C277
0.047uF
C9217
0.047uF
C260
0.047uF
C253
2.7K
R266
2.7K
R224
OPT
2.7K
R226
2.7K
R225
OPT
2.7K
R227
LGE3556C (C0 VERSION)
IC100
PKT0_CLK
D23
PKT0_DATA
C24
PKT0_SYNC
B26
RMX0_CLK
A25
RMX0_DATA
B25
RMX0_SYNC
A26
POD2CHIP_MCLKI
G23
POD2CHIP_MDI0
D25
POD2CHIP_MDI1
D24
POD2CHIP_MDI2
C25
POD2CHIP_MDI3
E27
POD2CHIP_MDI4
E26
POD2CHIP_MDI5
D28
POD2CHIP_MDI6
D27
POD2CHIP_MDI7
D26
POD2CHIP_MISTRT
E23
POD2CHIP_MIVAL
E24
CHIP2POD_MCLKO
F25
CHIP2POD_MDO0
C27
CHIP2POD_MDO1
C26
CHIP2POD_MDO2
B28
CHIP2POD_MDO3
B27
CHIP2POD_MDO4
A27
CHIP2POD_MDO5
F24
CHIP2POD_MDO6
F23
CHIP2POD_MDO7
E25
CHIP2POD_MOSTRT
C28
CHIP2POD_MOVAL
A28
VDAC_AVDD2P5
AC18
VDAC_AVDD1P2
AF20
VDAC_AVDD3P3_1
AG20
VDAC_AVDD3P3_2
AG21
VDAC_AVSS_1
AF19
VDAC_AVSS_2
AD20
VDAC_AVSS_3
AE20
VDAC_RBIAS
AH22
VDAC_1
AH20
VDAC_2
AG19
VDAC_VREG
AH21
BSC_S_SCL
M25
BSC_S_SDA
M24
USB_AVSS_1
R6
USB_AVSS_2
T6
USB_AVSS_3
R7
USB_AVSS_4
T7
USB_AVSS_5
T8
USB_AVDD1P2
R3
USB_AVDD1P2PLL
U3
USB_AVDD2P5
T4
USB_AVDD2P5REF
T3
USB_AVDD3P3
R4
USB_RREF
U4
USB_DM1
V1
USB_DP1
V2
USB_DM2
U1
USB_DP2
U2
USB_MONCDR
T5
USB_MONPLL
R5
USB_PWRFLT_1
R1
USB_PWRFLT_2
R2
USB_PWRON_1
T2
USB_PWRON_2
T1
EPHY_VREF
P6
EPHY_RDAC
P5
EPHY_RDN
P3
EPHY_RDP
P2
EPHY_TDN
N3
EPHY_TDP
N2
EPHY_AVDD1P2
P1
EPHY_AVDD2P5
P4
EPHY_PLL_VDD1P2
N4
EPHY_AGND_1
N1
EPHY_AGND_2
N5
EPHY_AGND_3
P7
AUDMX_LEFT1
AE6
AUDMX_RIGHT1
AD7
AUDMX_INCM1
AF6
AUDMX_LEFT2
AH4
AUDMX_RIGHT2
AG5
AUDMX_INCM2
AG4
AUDMX_LEFT3
AG6
AUDMX_RIGHT3
AF7
AUDMX_INCM3
AE7
AUDMX_LEFT4
AH5
AUDMX_RIGHT4
AG7
AUDMX_INCM4
AH6
AUDMX_LEFT5
AD8
AUDMX_RIGHT5
AF8
AUDMX_INCM5
AE8
AUDMX_LEFT6
AH7
AUDMX_RIGHT6
AH8
AUDMX_INCM6
AG8
AUDMX_AVSS_1
AF5
AUDMX_AVSS_2
AB9
AUDMX_AVSS_3
AA10
AUDMX_AVSS_4
AB10
AUDMX_AVSS_5
AA11
AUDMX_AVSS_6
AB11
AUDMX_LDO_CAP
AC8
AUDMX_AVDD2P5
AE5
LVDS_TX_0_DATA0_P
B4
LVDS_TX_0_DATA0_N
A4
LVDS_TX_0_DATA1_P
C6
LVDS_TX_0_DATA1_N
B6
LVDS_TX_0_DATA2_P
B3
LVDS_TX_0_DATA2_N
A3
LVDS_TX_0_DATA3_P
A1
LVDS_TX_0_DATA3_N
A2
LVDS_TX_0_DATA4_P
D5
LVDS_TX_0_DATA4_N
D6
LVDS_TX_0_CLK_P
C5
LVDS_TX_0_CLK_N
B5
LVDS_TX_1_DATA0_P
B1
LVDS_TX_1_DATA0_N
B2
LVDS_TX_1_DATA1_P
C2
LVDS_TX_1_DATA1_N
C3
LVDS_TX_1_DATA2_P
D1
LVDS_TX_1_DATA2_N
D2
LVDS_TX_1_DATA3_P
E1
LVDS_TX_1_DATA3_N
E2
LVDS_TX_1_DATA4_P
E3
LVDS_TX_1_DATA4_N
E4
LVDS_TX_1_CLK_P
D3
LVDS_TX_1_CLK_N
D4
LVDS_PLL_VREG
F5
LVDS_TX_AVDDC1P2
F1
LVDS_TX_AVDD2P5_1
F4
LVDS_TX_AVDD2P5_2
F2
LVDS_TX_AVSS_1
C1
LVDS_TX_AVSS_2
F3
LVDS_TX_AVSS_3
C4
LVDS_TX_AVSS_4
A5
LVDS_TX_AVSS_5
E5
LVDS_TX_AVSS_6
E6
LVDS_TX_AVSS_7
D7
LVDS_TX_AVSS_8
E7
LVDS_TX_AVSS_9
F7
LVDS_TX_AVSS_10
G7
LVDS_TX_AVSS_11
H7
CLK54_AVDD1P2
AD27
CLK54_AVDD2P5
AD28
CLK54_AVSS
AD26
CLK54_XTAL_N
AC26
CLK54_XTAL_P
AC27
CLK54_MONITOR
AE25
PM_OVERRIDE
Y23
VCXO_AGND_1
AA23
VCXO_AGND_2
AB24
VCXO_AGND_3
AC24
VCXO_AVDD1P2
AF25
VCXO_PLL_AUDIO_TESTOUT
AF24
RESET_OUTB
P24
RESETB
F6
NMIB
N24
TMODE_0
J 5
TMODE_1
J 4
TMODE_2
J 6
TMODE_3
J 3
SPI_S_MISO
V25
POR_OTP_VDD2P5
AH3
POR_VDD1P2
AB8
EJTAG_TCK
H4
EJTAG_TDI
H3
EJTAG_TDO
H2
EJTAG_TMS
H1
EJTAG_TRSTB
G1
EJTAG_CE0
H6
EJTAG_CE1
H5
PLL_MAIN_AVDD1P2
AB26
PLL_MAIN_AGND
AC25
PLL_MAIN_MIPS_EREF_TESTOUT
AB27
PLL_RAP_AVD_TESTOUT
M6
PLL_RAP_AVD_AVDD1P2
N6
PLL_RAP_AVD_AGND
N7
BYP_CPU_CLK
AA24
BYP_DS_CLK
Y24
BYP_SYS216_CLK
AE24
BYP_SYS175_CLK
AD25
54MHz
X903
2
1
SYS_RESET_BCM
EPHY_TDN
EPHY_TDP
22
R206
OPT
CI_OUTVALID
CI_OUTSTART
CI_OUTDATA[7]
CI_OUTDATA[6]
CI_OUTDATA[5]
CI_OUTDATA[4]
CI_OUTDATA[3]
CI_OUTDATA[2]
CI_OUTDATA[0]
CI_OUTDATA[1]
2
R o u t e I N C M b e t w e e n a s s o c i a t e d
l e f t a n d r i g h t s i g n a l s o f s a m e c h a n n e l
T h e I N C M t r a c e e n d s a t t h e
s a m e p o i n t w h e r e t h e c o n n e c t o r
g r o u n d c o n n e c t s t o t h e b o a r d g r o u n d
( t h r u - h o l e c o n n e c t o r p i n ) .
P l a c e t e s t p o i n t s , r e s i s t o r s
n e a r a u d i o c o n n e c t o r .
C o n n e c t t h e o t h e r s i d e o f
t h e r e s i s t o r t o G N D a s c l o s e
a s p o s s i b l e t o t h e g r o u n d
c o n n e c t i o n o f t h e a s s o c i a t e d
a u d i o c o n n e c t o r .
54MHz X-TAL
R220:BCM recommened
r e s i s t o r 5 6 2 o h m
BROAD BAND STUDIO
W h e n u s d i n g F U N D M E N T A l t h e n s e r i e s R = 0 o h m a n d C L = 8 p F
W h e n u s d i n g D i p - t y p e X - t a l t h e n s e r i e s R = 2 2 o h m a n d C L = 1 2 p F
VIDEO INCM
PLACE NEAR BCM CHIP
AUDIO INCM
Route Between COMP1_L_IN & COMP1_R_IN
Route Between SC1_L_IN & SC1_R_IN
Route Between PC_L_IN & PC_R_IN
Near J1603
Near J1500
Near J1602
Near Q1705
Near J1500
Near J1603
Near P1600
Near Q1704
Near J1500
Route Along With TUNER_SIF_IF_N
Run Along TUNER_CVBS_IF_P Trace
Run Along SC1_R,SC_G,SC_B Trace
Run Along COMP1_Y_IN,COMP1_Pr_IN,COMP1_Pb_IN Trace
Run Along DSUB_R Trace
Run Along DSUB_G Trace
Run Along DSUB_B Trace
Run Along SC1_CVBS_IN Trace
PKT DATA to PROiDiom
f o r P P V o v e r I P
PLACE NEAR BCM CHIP
T P i s N e c e s s o r y
BCM3556 & AUD_IN/LVDS
2 0 1 0 . 1 2 . 2 0
Chameleon(EU_GP2_BCM3556)
xxLV375H-ZA
Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only